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* freedreno/a6xx: add 'type' to shader state keyRob Clark2019-05-312-0/+2
* freedreno/a6xx: fix GPU crash on small render targetsRob Clark2019-05-311-0/+7
* panfrost: Remove link stage for jobsTomeu Vizoso2019-05-312-68/+54
* panfrost: ci: Switch to kernel 5.2-rc2Tomeu Vizoso2019-05-311-4/+3
* panfrost: ci: Update expectationsTomeu Vizoso2019-05-311-8/+3
* radeonsi/nir: Remove hack for builtinsConnor Abbott2019-05-311-11/+2
* radeonsi/nir: Use correct location for uniform access boundConnor Abbott2019-05-311-1/+1
* radeonsi/nir: Correctly handle double TCS/TES varyingsConnor Abbott2019-05-311-4/+28
* etnaviv: blt: s/TRUE/true && s/FALSE/falseChristian Gmeiner2019-05-311-6/+6
* etnaviv: rs: s/TRUE/true && s/FALSE/falseChristian Gmeiner2019-05-311-8/+8
* swr/rast: Enable ARB_GL_texture_buffer_rangeJan Zielinski2019-05-301-1/+1
* swr/rast: fix 32-bit compilation on LinuxJan Zielinski2019-05-301-65/+0
* iris: Avoid holding the lock while allocating pages.Kenneth Graunke2019-05-301-5/+5
* iris: Move SET_DOMAIN to alloc_fresh_bo()Kenneth Graunke2019-05-301-17/+15
* iris: Be lazy about cleaning up purged BOs in the cache.Kenneth Graunke2019-05-291-17/+1
* iris: Dig through the cache to find a BO in the right memzoneKenneth Graunke2019-05-291-7/+17
* iris: Tidy BO sizing code and commentsKenneth Graunke2019-05-291-12/+5
* iris: Move some field setting after we drop the lock.Kenneth Graunke2019-05-291-13/+13
* iris: Move cached BO allocation into a helper function.Kenneth Graunke2019-05-291-44/+64
* iris: Fall back to fresh allocations of mapping for zero-memset fails.Kenneth Graunke2019-05-291-3/+4
* iris: Move fresh BO allocation into a helper function.Kenneth Graunke2019-05-291-26/+30
* iris: Do SET_TILING at a single point rather than in two places.Kenneth Graunke2019-05-291-20/+20
* iris: Use the BO cache even for coherent buffers on non-LLC.Kenneth Graunke2019-05-291-3/+0
* iris: Fix locking around vma_alloc in iris_bo_create_userptrKenneth Graunke2019-05-291-0/+4
* iris: Fix lock/unlock mismatch for non-LLC coherent BO allocation.Kenneth Graunke2019-05-291-7/+3
* radeonsi: fix timestamp queries for compute-only contextsMarek Olšák2019-05-291-3/+5
* Change a few frequented uses of DEBUG to !NDEBUGMarek Olšák2019-05-295-8/+8
* iris: Re-emit Surface State Base Address when context is lost.Kenneth Graunke2019-05-291-0/+1
* iris: Enable nir_opt_large_constantsJason Ekstrand2019-05-294-0/+82
* iris: Don't assume UBO indices are constantJason Ekstrand2019-05-291-1/+2
* iris: Move upload_ubo_ssbo_surf_state to iris_program.cJason Ekstrand2019-05-293-39/+56
* svga: clamp max_const_buffers to SVGA_MAX_CONST_BUFSBrian Paul2019-05-291-1/+2
* iris: Clone before calling nir_strip and serializingKenneth Graunke2019-05-291-6/+8
* iris: Only store the SHA1 of the NIR in iris_uncompiled_shaderKenneth Graunke2019-05-293-13/+7
* spirv: Change spirv_to_nir() to return a nir_shaderCaio Marcelo de Oliveira Filho2019-05-291-4/+4
* virgl: fix readback with pending transfersChia-I Wu2019-05-291-6/+26
* radeonsi: Fix editorconfigConnor Abbott2019-05-291-0/+1
* meson: Link Gallium drivers with ld_args_build_idMike Lothian2019-05-281-1/+1
* radeonsi: clean up winsys creationMarek Olšák2019-05-275-36/+30
* radeonsi: allow query functions for compute-only contextsMarek Olšák2019-05-272-4/+5
* ac: treat Mullins as Kabini, remove the enumMarek Olšák2019-05-273-9/+3
* etnaviv: rs: choose clear format based on block sizeChristian Gmeiner2019-05-271-1/+13
* lima/ppir: implement discard and discard_ifVasily Khoruzhick2019-05-277-10/+253
* iris: Don't flag IRIS_DIRTY_URB after BLORP operations unless it changedKenneth Graunke2019-05-261-0/+1
* panfrost/midgard: Implement fneg/fabs/fsatAlyssa Rosenzweig2019-05-261-0/+20
* lima: fix lima_blit with non-zero level source resourceQiang Yu2019-05-251-25/+12
* lima: fix render to non-zero level textureQiang Yu2019-05-251-4/+6
* virgl: remove an incorrect check in virgl_res_needs_flushChia-I Wu2019-05-241-15/+0
* virgl: reemit resources on first draw/clear/computeChia-I Wu2019-05-241-6/+24
* virgl: add missing emit_res for SO targetsChia-I Wu2019-05-241-2/+8