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* virgl: when creating / freeing transfers, pass slab pool directlyGurchetan Singh2019-02-154-14/+14
* virgl: unmap uploader at flush timeGurchetan Singh2019-02-151-2/+3
* virgl: make alignment smaller when uploading index user buffersGurchetan Singh2019-02-151-1/+1
* virgl: track level cleanliness rather than resource cleanlinessGurchetan Singh2019-02-156-14/+20
* virgl: don't mark unclean after a flushGurchetan Singh2019-02-151-1/+0
* virgl: use virgl_resource_dirty helperGurchetan Singh2019-02-156-16/+19
* virgl: add ability to do finer grain dirty trackingGurchetan Singh2019-02-158-13/+15
* panfrost: Improve logging and patch memory leaksAlyssa Rosenzweig2019-02-152-49/+48
* panfrost: Don't align framebuffer dimsAlyssa Rosenzweig2019-02-151-2/+2
* panfrost: Implement PIPE_QUERY_OCCLUSION_COUNTERAlyssa Rosenzweig2019-02-151-1/+8
* panfrost: Identify MALI_OCCLUSION_PRECISE bitAlyssa Rosenzweig2019-02-152-5/+7
* panfrost: Backport driver to Mali T600/T700Alyssa Rosenzweig2019-02-156-262/+340
* panfrost: Fix build; depend on libdrmAlyssa Rosenzweig2019-02-151-0/+1
* swr: set PIPE_CAP_MAX_VARYINGS correctlyIlia Mirkin2019-02-141-0/+2
* etnaviv: drop duplicate #defineEric Engestrom2019-02-141-4/+0
* st/dri: drop duplicate #defineEric Engestrom2019-02-141-4/+0
* drm-uapi: use local files, not system libdrmEric Engestrom2019-02-1441-44/+45
* nir: Move panfrost's isign lowering to nir_opt_algebraic.Eric Anholt2019-02-142-1/+1
* gallium/aux: add PIPE_CAP_MAX_VARYINGS to u_screenAlok Hota2019-02-131-0/+3
* freedreno/a6xx: Fix point coordKristian H. Kristensen2019-02-133-8/+4
* freedreno/a6xx: Front facing needs UNK3 bitKristian H. Kristensen2019-02-131-2/+5
* freedreno/a6xx: Update headersKristian H. Kristensen2019-02-132-7/+7
* freedreno/a6xx: Clean up mixed use of swap and swizzle for texture stateKristian H. Kristensen2019-02-132-39/+28
* freedreno/a6xx: small compiler warning fixRob Clark2019-02-131-0/+2
* radeonsi: Fix guardband computation for large render targetsOscar Blumberg2019-02-121-2/+28
* gallium/swr: Param defaults for unhandled PIPE_CAPsAlok Hota2019-02-121-4/+3
* radeonsi: use MEM instead of MEM_GRBM in COPY_DATA.DST_SELMarek Olšák2019-02-121-3/+3
* radeonsi: add AMD_DEBUG env var as an alternative to R600_DEBUGMarek Olšák2019-02-121-1/+3
* freedreno/a6xx: Fall back to masked RGBA blits for depth/stencilKristian H. Kristensen2019-02-111-5/+44
* freedreno/a6xx: Add format argument to fd6_tex_swiz()Kristian H. Kristensen2019-02-114-8/+10
* freedreno/a6xx: Support y-inverted blitsKristian H. Kristensen2019-02-111-5/+2
* freedreno/a6xx: Support some depth/stencil blits on blitterKristian H. Kristensen2019-02-111-1/+84
* freedreno/a6xx: Move blit check so as to restore commentKristian H. Kristensen2019-02-111-4/+4
* freedreno: Don't tell the blitter what it can't doKristian H. Kristensen2019-02-111-2/+4
* freedreno: Consolidate u_blitter functions in freedreno_blitter.cKristian H. Kristensen2019-02-115-149/+153
* freedreno/a6xx: Combine emit_blit and fd6_blitKristian H. Kristensen2019-02-111-12/+5
* freedreno/a6xx: Use the right resource for separate stencil strideKristian H. Kristensen2019-02-111-1/+1
* freedreno: Log number of draw for sysmem passesKristian H. Kristensen2019-02-111-2/+3
* freedreno/a6xx: Drop render condition check in blitterKristian H. Kristensen2019-02-111-5/+16
* st/va/vp9: set max reference as default of VP9 reference numberLeo Liu2019-02-111-1/+6
* st/va: fix the incorrect max profiles reportLeo Liu2019-02-112-2/+3
* st/va:Add support for indirect manner by returning VA_STATUS_ERROR_OPERATION_...Guttula, Suresh2019-02-111-2/+5
* winsys/amdgpu: cs_check_space sets the minimum IB size for future IBsMarek Olšák2019-02-112-2/+23
* winsys/amdgpu: clean up IB buffer size computationMarek Olšák2019-02-111-8/+4
* winsys/amdgpu: remove occurence of INDIRECT_BUFFER_CONSTMarek Olšák2019-02-111-2/+1
* winsys/amdgpu: use a separate fence list for syncobjsMarek Olšák2019-02-112-17/+15
* winsys/amdgpu: unify fence list codeMarek Olšák2019-02-112-59/+42
* winsys/amdgpu: don't drop manually added fence dependenciesMarek Olšák2019-02-111-2/+0
* radeonsi: fix EXPLICIT_FLUSH for flush offsets > 0Marek Olšák2019-02-111-2/+5
* gallium/u_threaded: fix EXPLICIT_FLUSH for flush offsets > 0Marek Olšák2019-02-111-1/+2
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