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* freedreno/ir3: use unsigned comparison for UIFIlia Mirkin2014-09-121-4/+4
* freedreno/ir3: negate result of USLT/etcIlia Mirkin2014-09-121-8/+15
* freedreno/ir3: add UARL supportIlia Mirkin2014-09-121-2/+4
* freedreno/ir3: INEG operates on src0, not src1Ilia Mirkin2014-09-121-1/+3
* freedreno/ir3: fix FSLT/etc handling to return 0/-1 instead of 0/1.0Ilia Mirkin2014-09-121-4/+8
* freedreno/a3xx: alpha render-target shenanigansRob Clark2014-09-124-2/+34
* util/u_format: add _is_alpha()Rob Clark2014-09-122-0/+19
* freedreno/a3xx: format fixesRob Clark2014-09-123-5/+20
* freedreno: update generated headersRob Clark2014-09-124-4/+6
* freedreno/a3xx: handle rendering to layer != 0Rob Clark2014-09-121-2/+12
* r300g: set register classes before interferencesConnor Abbott2014-09-121-2/+4
* gallium/util: add missing u_debug includeAndreas Boll2014-09-121-0/+1
* ilo: fix builder size checks for BLT buffer clear/copyChia-I Wu2014-09-121-4/+8
* ilo: reduce BLT function parametersChia-I Wu2014-09-122-142/+171
* ilo: clean up BLT functionsChia-I Wu2014-09-122-104/+91
* ilo: clean up MI functionsChia-I Wu2014-09-123-40/+45
* ilo: move BLT functions to ilo_builder_blt.hChia-I Wu2014-09-123-257/+296
* ilo: move MI functions to ilo_builder_mi.hChia-I Wu2014-09-128-168/+192
* ilo: add ILO_DEV_ASSERT()Chia-I Wu2014-09-125-113/+118
* ilo: use an accessor for dev->genChia-I Wu2014-09-1224-171/+198
* ilo: add GEN_EXTRACT() and GEN_SHIFT32()Chia-I Wu2014-09-124-133/+142
* ilo: remove ILO_GEN_GET_MAJOR()Chia-I Wu2014-09-121-1/+0
* ilo: careful with empty fb state in ilo_gpe_set_fb()Chia-I Wu2014-09-122-1/+6
* nv50,nvc0: enable ARB_texture_viewIlia Mirkin2014-09-124-6/+6
* gallium: add a texture target to sampler view and a CAP to use itIlia Mirkin2014-09-1217-0/+20
* nouveau: remove unneeded assertMaarten Lankhorst2014-09-111-1/+0
* nouveau: rework reference frame handlingMaarten Lankhorst2014-09-113-4/+37
* nouveau: fix MPEG4 hw decodingMaarten Lankhorst2014-09-111-3/+3
* nouveau: re-allocate bo's on overflowMaarten Lankhorst2014-09-114-11/+87
* ilo: fix a compile error with -Werror=format-securityChia-I Wu2014-09-121-1/+1
* radeon/uvd: use PIPE_USAGE_STAGING for msg&fb buffersChristian König2014-09-111-1/+1
* radeon/video: use the hw to initial clear the buffersChristian König2014-09-113-10/+8
* radeon/video: use more of the common buffer code v2Christian König2014-09-116-67/+62
* ilo: add a new disassemblerChia-I Wu2014-09-113-4444/+1352
* ilo: update genhw headersChia-I Wu2014-09-1111-247/+203
* radeonsi: Simplify si_dma_copy_tile functionMichel Dänzer2014-09-111-62/+41
* u_vbuf: simple whitespace fixBrian Paul2014-09-101-1/+2
* pipe-loader: Include unistd.h in pipe_loader_drm.c for close function.Vinson Lee2014-09-101-0/+1
* vc4: Add support for shadow samplers.Eric Anholt2014-09-091-3/+58
* vc4: Add support for texture swizzles.Eric Anholt2014-09-091-1/+8
* vc4: Move the texture format into a struct.Eric Anholt2014-09-091-3/+5
* vc4: Add support for depth texturing.Eric Anholt2014-09-091-3/+13
* vc4: Expose r4 to register allocation.Eric Anholt2014-09-094-23/+49
* vc4: Drop pointless raddr conflict handling on SF.Eric Anholt2014-09-091-1/+0
* vc4: The r4_count is supposed to be how many writes, not reads.Eric Anholt2014-09-091-1/+1
* r600g,radeonsi: Set RADEON_GEM_NO_CPU_ACCESS flag for tiled BOsMichel Dänzer2014-09-103-5/+13
* freedreno/a3xx: enable hw primitive-restartRob Clark2014-09-094-9/+20
* freedreno: update generated headersRob Clark2014-09-094-13/+18
* freedreno/ir3: fix potential segfault in RARob Clark2014-09-091-2/+6
* freedreno: don't overflow cmdstream buffer so muchRob Clark2014-09-091-0/+15