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* radeonsi: add a drirc workaround for HTILE corruption in ARK: Survival EvolvedMarek Olšák2017-10-064-0/+22
* radeonsi: inline struct si_sampler_viewsMarek Olšák2017-10-065-42/+37
* radeonsi: rename si_textures_info -> si_samplers, si_images_info -> si_imagesMarek Olšák2017-10-063-20/+20
* radeonsi: fold needs_*_decompress_mask update into si_set_sampler_viewMarek Olšák2017-10-061-54/+46
* radeonsi: simplify a loop in si_update_fb_dirtiness_after_renderingMarek Olšák2017-10-061-15/+11
* radeonsi: use f32_0 and f32_1Marek Olšák2017-10-064-26/+26
* radeonsi: fold *gallivmMarek Olšák2017-10-062-52/+31
* radeonsi: lp_type::length is always 1Marek Olšák2017-10-061-2/+2
* radeonsi: don't use bld.elem_typeMarek Olšák2017-10-061-4/+4
* radeonsi: don't use lp_build_const_*Marek Olšák2017-10-062-9/+5
* radeonsi: use ctx->ac.context and ctx->typesMarek Olšák2017-10-064-46/+34
* radeonsi: use ctx->ac.builderMarek Olšák2017-10-064-422/+342
* radeonsi: use ctx->i/f32 types moreMarek Olšák2017-10-061-6/+6
* radeonsi: use i32_0 and i32_1 moreMarek Olšák2017-10-062-11/+13
* radeonsi: use bitcast in a few placesMarek Olšák2017-10-061-5/+2
* radeonsi: use ac helpers for bitcastsMarek Olšák2017-10-064-128/+87
* radeonsi: implement PIPE_CAP_TGSI_ANY_REG_AS_ADDRESSMarek Olšák2017-10-062-5/+20
* radeonsi: use si_get_indirect_index for TEMP indexingMarek Olšák2017-10-061-18/+4
* radeonsi: use si_get_indirect_index for CONST indexingMarek Olšák2017-10-063-14/+14
* tgsi/ureg: allow any register file in address operandsMarek Olšák2017-10-061-6/+0
* gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESSMarek Olšák2017-10-0617-0/+18
* tgsi/scan: scan address operands (v2)Marek Olšák2017-10-061-1/+42
* tgsi/scan: set correct usage mask for tex offsets in scan_src_operandMarek Olšák2017-10-061-4/+4
* tgsi/scan: take advantage of already swizzled usage mask in scan_src_operandMarek Olšák2017-10-061-30/+17
* tgsi/scan: set non-valid src_index for tex offsets in scan_src_operandMarek Olšák2017-10-061-1/+1
* tgsi: implement tgsi_util_get_inst_usage_mask properlyMarek Olšák2017-10-063-124/+206
* tgsi: add docs for some existing pack opcodesMarek Olšák2017-10-061-3/+21
* broadcom: Fix out-of-tree build include pathDaniel Stone2017-10-051-0/+2
* broadcom/vc4: Don't advertise tiled dmabuf modifiers if we can't use themDerek Foreman2017-10-051-13/+18
* gallivm/ppc64le: allow environmental control of Altivec code generationBen Crocker2017-10-051-8/+24
* gallivm/ppc64le: adjust VSX code generation control.Ben Crocker2017-10-051-7/+30
* gallivm: allow additional llc optionsBen Crocker2017-10-051-0/+23
* gallivm: fix typo in debug_printf messageBen Crocker2017-10-051-1/+1
* st/va: add RGB support to vlVaPutSurfaceLeo Liu2017-10-041-1/+13
* st/va: don't re-allocate interlaced buffer with pakced formatLeo Liu2017-10-041-4/+6
* st/vdpau: don't re-allocate interlaced buffer with packed YUV formatLeo Liu2017-10-041-0/+2
* llvmpipe: silence 'variable may be used uninitialized' warningsBrian Paul2017-10-032-2/+2
* svga: wrap long comments in svga_tgsi_vgpu10.cBrian Paul2017-10-031-4/+6
* svga: tweak pre-VGPU10 rasterization offsetsBrian Paul2017-10-031-17/+7
* svga: if we get nr_samples==1, store nr_samples=0Brian Paul2017-10-031-4/+7
* svga: emit sampler constants only if sampler view existsCharmaine Lee2017-10-031-7/+12
* svga: fix incorrect case in svga_typeless_format()Brian Paul2017-10-031-2/+1
* svga: add typeless switch cases in svga_typeless_format()Brian Paul2017-10-031-0/+10
* svga: Allow sRGB format with PIPE_BIND_DISPLAY_TARGET binding flag on vgpu10.Neha Bhende2017-10-031-2/+7
* etnaviv: Set up unknown GC3000 statesWladimir J. van der Laan2017-10-031-0/+11
* etnaviv: Fix point sprite rendering on GC3000Wladimir J. van der Laan2017-10-031-0/+2
* etnaviv: Add support for DP2 instructionWladimir J. van der Laan2017-10-034-1/+7
* etnaviv: Support opcodes with bit 6 set in assemblerWladimir J. van der Laan2017-10-031-1/+4
* gallium/u_tests: fix ifdef for sync_file fencesGeorge Kyriazis2017-10-031-1/+1
* mesa: Remove force_s3tc_enable driconf variableMatt Turner2017-10-024-5/+0
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