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* freedreno/ir3: ignore return jumpRob Clark2018-03-051-0/+1
* freedreno: add some more compute capsRob Clark2018-03-052-4/+21
* freedreno/a5xx: don't expose 64b pointers yetRob Clark2018-03-051-2/+5
* freedreno: steal handy macro for compute caps from nouveauRob Clark2018-03-051-42/+17
* freedreno: add global_bindings stateRob Clark2018-03-054-4/+85
* freedreno/ir3: small cleanupRob Clark2018-03-051-3/+3
* freedreno: add pctx->memory_barrier()Rob Clark2018-03-051-0/+8
* freedreno/ir3: cmdline compiler updates for spv shadersRob Clark2018-03-051-0/+7
* ac: add ac_build_fsign()Samuel Pitoiset2018-03-051-11/+4
* ac: add ac_build_isign()Samuel Pitoiset2018-03-051-8/+2
* ac: add ac_build_fract()Samuel Pitoiset2018-03-051-8/+5
* virgl: add offset alignment values to to v2 caps struct[email protected]2018-03-053-2/+6
* virgl: reduce some default capset limits.Dave Airlie2018-03-051-8/+8
* virgl: handle getting new capsets.Dave Airlie2018-03-056-31/+52
* radeonsi/nir: call ac_lower_indirect_derefs()Timothy Arceri2018-03-054-4/+6
* radeonsi: add chip class to compiler_ctx_stateTimothy Arceri2018-03-053-0/+4
* swr/rast: Fix macOS macro.Vinson Lee2018-03-041-2/+2
* svga: add SVGA_NEW_PRESCALE to the tracked dirty mask for gsCharmaine Lee2018-03-021-1/+2
* svga: fix blending regressionBrian Paul2018-03-021-11/+24
* svga: check svga_have_vgpu10() in svga_delete_blend_state()Brian Paul2018-03-021-1/+1
* svga: if svga_update_state() fails, skip the draw callBrian Paul2018-03-021-5/+5
* svga: let svga_update_state_retry() return a boolBrian Paul2018-03-022-6/+9
* svga: s/unsigned/boolean/ for a few local varsBrian Paul2018-03-021-6/+6
* st/omx_bellagio: add picture profile and entry pointBoyuan Zhang2018-03-021-0/+2
* radeonsi: fix radeon create encoder returnBoyuan Zhang2018-03-021-1/+1
* r600/cayman: fix fragcood loading recip generation.Dave Airlie2018-03-021-1/+1
* gallium/util: use sockets on PIPE_OS_UNIX in u_networkJonathan Gray2018-03-012-10/+4
* radeonsi/nir: increase values to 8 for gs fetch.Dave Airlie2018-03-011-1/+1
* radeonsi: set some context vars for nir pathTimothy Arceri2018-03-011-6/+10
* gallium: remove llvm from ir structTimothy Arceri2018-03-011-1/+0
* broadcom/vc5: Fix regression in the page-cache slice size alignment.Eric Anholt2018-02-281-3/+6
* r600/shader: when using images always load thread id gpr at start (v2)Dave Airlie2018-02-281-15/+7
* r600: fix whitespace in recent 1d texture commit.Dave Airlie2018-02-281-1/+1
* swr/rast: revert clip distance precisionGeorge Kyriazis2018-02-282-4/+17
* swr/rast: Faster frustum prim cullingGeorge Kyriazis2018-02-281-3/+7
* swr/rast: Consolidate TRANSLATE_ADDRESSGeorge Kyriazis2018-02-284-6/+28
* swr/rast: Code generation cleanupGeorge Kyriazis2018-02-281-15/+21
* swr/rast: Remove draw type from event definitionsGeorge Kyriazis2018-02-283-12/+8
* swr/rast: whitespace changeGeorge Kyriazis2018-02-281-1/+1
* swr/rast: Fix index buffer overfetch issue for non-indexed drawsGeorge Kyriazis2018-02-281-0/+15
* softpipe: don't iterate through PIPE_MAX_SHADER_SAMPLER_VIEWSRoland Scheidegger2018-02-281-2/+2
* cso: don't cycle through PIPE_MAX_SHADER_SAMPLER_VIEWS on context destroyRoland Scheidegger2018-02-281-1/+3
* draw: don't needlessly iterate through all sampler view slotsRoland Scheidegger2018-02-281-1/+1
* winsys/amdgpu: request high addressesChristian König2018-02-281-4/+12
* r600: partly revert disabling tiling for 1d texture.Dave Airlie2018-02-281-0/+5
* nir: add lower_ldexp to nir compiler optionsTimothy Arceri2018-02-282-0/+2
* ac/radeonsi: add load_base_vertex() to the abiTimothy Arceri2018-02-281-0/+1
* radeonsi: create get_base_vertex() helperTimothy Arceri2018-02-281-14/+20
* radeonsi/nir: disable vertex_id_zero_based loweringTimothy Arceri2018-02-281-1/+0
* nvc0: collapse output slots to have adjacent registersIlia Mirkin2018-02-271-2/+12
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