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* gallium/cso: allow saving the first fragment shader image slotNicolai Hähnle2016-06-012-0/+48
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/u_inlines: allow NULL src in util_copy_image_viewNicolai Hähnle2016-06-011-4/+11
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: add PIPE_BARRIER_ALL defineNicolai Hähnle2016-06-011-0/+1
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: set correct stencil tile mode for texturingMarek Olšák2016-06-011-2/+8
| | | | | | Sadly, this doesn't affect SI and VI in any way. Reviewed-by: Michel Dänzer <[email protected]>
* winsys/amdgpu: set flags correctly when allocating depth-stencil buffersMarek Olšák2016-06-011-2/+8
| | | | | | This mimics Vulkan. It also documents how to fix stencil texturing. Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: lower memory usage during texture transfersMarek Olšák2016-06-012-4/+29
| | | | | | | | | | | | This improves throughput by keeping TTM overhead down. Some piglit tests such as texelFetch and streaming-texture-leak will use less memory now. v2: use gart_size / 4 as the threshold Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: invalidate busy linear textures for whole-texture uploadsMarek Olšák2016-06-011-2/+28
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/radeon: degrade tiled textures mapped often to linearMarek Olšák2016-06-012-0/+103
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/radeon: clean up and better comment use_staging_textureMarek Olšák2016-06-011-19/+23
| | | | | | | Next commits will add other things around this. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: set some colorbuffer register fields at emit timeMarek Olšák2016-06-013-50/+47
| | | | | | | to allow reallocating the texture storage with different parameters Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: implement global resetting of texture descriptorsMarek Olšák2016-06-014-6/+64
| | | | | | | it will be used by texture reallocation Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: move code for setting one shader image into separate functionMarek Olšák2016-06-011-71/+82
| | | | | | | v2: fix set_shader_images(..., NULL). Found by Christoph Haag. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: set some image descriptor fields at bind timeMarek Olšák2016-06-014-71/+111
| | | | | | | | mainly the fields that can change by reallocating a texture and changing the tile mode Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/radeon: strenghten some checking for DMA preparationMarek Olšák2016-06-011-1/+6
| | | | | | | | | | Just for consistency. This doesn't fix anything, because DCC is not supported with non-mipmapped textures. v1.1: fix the comment about DCC Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/util: add util_texrange_covers_whole_level from radeonMarek Olšák2016-06-012-17/+18
| | | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: fix the raster config setup for 1 RB iceland chipsAlex Deucher2016-06-011-1/+4
| | | | | | | | | I didn't realize there were 1 and 2 RB variants when this code was originally added. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: 11.1 11.2 12.0 <[email protected]>
* nv50/ir: fix error finding free element in bitset in some situationsIlia Mirkin2016-05-311-0/+6
| | | | | | | | | | | | | | This really only hits for bitsets with a size of a multiple of 32. We can end up with pos = -1 as a result of the ffs, which we in turn decide is a valid position (since we fall through the loop and i == 1, we end up adding 32 to it, so end up returning 31 again). Up until recently this was largely unreachable, as the register file sizes were all 63 or 255. However with the advent of compute shaders which can restrict the number of registers, this can now happen. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "12.0" <[email protected]>
* nv50/ir: print relevant file's bitset when showing RA infoIlia Mirkin2016-05-311-4/+4
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* radeonsi: Decompress DCC textures in a render feedback loop.Bas Nieuwenhuizen2016-05-314-0/+113
| | | | | | | | | By using a counter to quickly reject textures that are not bound to a framebuffer, the performance impact when binding sampler_views/images is not too large. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Add counter to check if a texture is bound to a framebuffer.Bas Nieuwenhuizen2016-05-314-0/+26
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* vc4: Fix compiler warnings in fail_instr path of QIR validate passRhys Kidd2016-05-311-10/+10
| | | | | | | Introduced in 8e2d0843c02daf5280184f179ae8ed440ac90d7f. Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* svga: change enum pipe_resource_usage back to unsignedBrian Paul2016-05-311-1/+1
| | | | | | | | | This parameter is actually a bitmask of PIPE_TRANSFER_x flags. Change it back to a simple unsigned type. IIRC, some compilers complain about masks of enum values. Also, this make the function signature match u_resource_vtbl::transfer_map() again. Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi: fix CP DMA hazard with index buffer fetchesMarek Olšák2016-05-311-2/+20
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: do GL-compliant integer resolvesMarek Olšák2016-05-311-37/+1
| | | | | | | The GL spec has been clarified and the new rule says we should just copy 1 sample. u_blitter does the right thing. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: do GL-compliant integer resolvesMarek Olšák2016-05-311-37/+1
| | | | | | | The GL spec has been clarified and the new rule says we should just copy 1 sample. u_blitter does the right thing. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_blitter: do GL-compliant integer resolvesMarek Olšák2016-05-311-19/+7
| | | | | | | The GL spec has been clarified and the new rule says we should just copy 1 sample. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't flush TC at the end of IBs on DRM >= 3.2.0Marek Olšák2016-05-311-2/+3
| | | | | | It's not needed since it was fixed in the kernel. Reviewed-by: Alex Deucher <[email protected]>
* gallium/radeon: fixed division by zeroJakob Sinclair2016-05-311-0/+3
| | | | | | | | | | Coverity is getting a false positive that a division by zero can occur here. This change will silence the Coverity warnings as a division by zero cannot occur in this case. Signed-off-by: Jakob Sinclair <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* nvc0/ir: fix spilling predicates to registersIlia Mirkin2016-05-301-0/+4
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: "11.1 11.2 12.0" <[email protected]>
* nvc0/ir: limit max number of regs based on availability in SMIlia Mirkin2016-05-302-2/+4
| | | | | | | | | This effectively limits registers to 32 and 64 for fermi and kepler when 1024 threads are used, but allows the full amount to be used with smaller thread sizes. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nv50/ir: record number of threads in a compute shaderIlia Mirkin2016-05-305-2/+10
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nv50/ir: Add missing handling of U64/S64 in inlinesPierre Moreau2016-05-301-1/+3
| | | | | Signed-off-by: Pierre Moreau <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* vc4: Fix doxygen warnings12.0-branchpointRhys Kidd2016-05-302-6/+6
| | | | | | | | Now that vc4 automated code documentation can be generated with doxygen, fix the warnings issued by Doxygen 1.8.11. Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa_glinterop: remove mesa_glinterop typedefsEmil Velikov2016-05-301-3/+3
| | | | | | | | | | | | | | | | As is there are two places that do the typedefs - dri_interface.h and this header. As we cannot include the former in here, just drop the typedefs and use the struct directly (as needed). This is required because typedef redefinition is C11 feature which is not supported on all the versions of GCC used to build mesa. v2: Kill the typedef alltogether, as per Marek. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96236 Cc: Vinson Lee <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallivm: initialize init_native_targets_once_flag correctlyFrederic Devernay2016-05-301-1/+1
| | | | Signed-off-by: Marek Olšák <[email protected]>
* nvc0/ir: fix emission of predicate spill to registerIlia Mirkin2016-05-301-1/+2
| | | | | | The lane mask only applies to real mov's, while here we're using PSET. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: fix some compute texture validation bits on keplerIlia Mirkin2016-05-303-2/+7
| | | | | | | | | (a) Make sure to update the TIC in case of an updated buffer address (b) Mark newly-inactive textures dirty so that we update the handle in set_tex_handles. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* swr: automake: silence the python invocationEmil Velikov2016-05-301-7/+8
| | | | | Cc: Tim Rowley <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* swr: automake: attempt to fix the out-of-tree buildEmil Velikov2016-05-301-0/+7
| | | | | | | | | | Make sure that the output folder is created otherwise the python scripts yells at us. Cc: [email protected] Cc: Tim Rowley <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96238 Signed-off-by: Emil Velikov <[email protected]>
* swr: remove LLVM dependency from source generation rules.Emil Velikov2016-05-301-2/+2
| | | | | | | | | | The dependencies should not mention any files external to the project. If we want to do sanity checks for the LLVM installed on the system we should do that in configure, yet again where is the merit which header gets checked and which doesn't ? Cc: Tim Rowley <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* swr: add all the generators to the release tarball.Emil Velikov2016-05-301-0/+24
| | | | | | Namely the python scripts and the knobs.template. Signed-off-by: Emil Velikov <[email protected]>
* softpipe: add sp_buffer.h to the sources list (release tarball)Emil Velikov2016-05-301-0/+1
| | | | Signed-off-by: Emil Velikov <[email protected]>
* freedreno: make sure we pick up ir3_nir_trig.py in the release tarballEmil Velikov2016-05-301-0/+1
| | | | Signed-off-by: Emil Velikov <[email protected]>
* gallium: push offset down to driverStanimir Varbanov2016-05-309-5/+53
| | | | | | | | | | | | | Push offset down to drivers when importing dmabuf. This is needed to more fully support EGL_EXT_image_dma_buf_import when a non-zero offset is specified. Tesing has been done for freedreno, and compile tested following gallium drivers: nouveau,svga,virgl,r600,r300,radeonsi,swrast,i915,ilo Signed-off-by: Stanimir Varbanov <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* st/dri: cleanup image_from_fd/dma_buf pathsStanimir Varbanov2016-05-301-37/+44
| | | | | Signed-off-by: Stanimir Varbanov <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* st/dri: add handling of R8 and GR88 DRI fourcc formatsStanimir Varbanov2016-05-301-0/+20
| | | | | | | | | This helps to import dmabuf buffers from DRM_FORMAT_R8 and DRM_FORMAT_GR88 used for example by GStreamer for YUV to RGB conversion using shaders. Signed-off-by: Stanimir Varbanov <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* radeonsi: Don't offset OFFCHIP_BUFFERING on pre-VI cards.Bas Nieuwenhuizen2016-05-301-2/+6
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96239 Reviewed-by: Marek Olšák <[email protected]>
* nv50,nvc0: fix the max_vertices=0 caseIlia Mirkin2016-05-293-2/+4
| | | | | | | This is apparently legal. Drop any emit/restarts, and pass a 1 to the hardware. Signed-off-by: Ilia Mirkin <[email protected]>
* swr: [rasterizer] Do not define _mm256_storeu2_m128i with icc.Vinson Lee2016-05-281-1/+1
| | | | | | | | | | | | | | | | Fix build error with icc. CXX libswrAVX_la-swr_clear.lo icpc: command line warning #10006: ignoring unknown option '-Wdelete-non-virtual-dtor' In file included from ./rasterizer/jitter/jit_api.h(31), from swr_context.h(30), from swr_clear.cpp(24): ./rasterizer/common/os.h(135): error: expected an identifier void _mm256_storeu2_m128i(__m128i *hi, __m128i *lo, __m256i a) ^ Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* gk110/ir: fix unspilling of predicates from registersIlia Mirkin2016-05-281-0/+28
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96258 Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.2 11.1" <[email protected]>
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