summaryrefslogtreecommitdiffstats
path: root/src/gallium
Commit message (Expand)AuthorAgeFilesLines
* winsys/radeon: fix up default enabled_rb_mask for r600Roland Scheidegger2018-01-101-6/+10
* r600: fix enabled_rb_mask on eg/cmRoland Scheidegger2018-01-101-2/+9
* r600: fix sampler indexing with texture buffers samplingRoland Scheidegger2018-01-102-2/+4
* r600: don't use vtx offset for load_sample_positionRoland Scheidegger2018-01-101-1/+1
* r600: drop l2 related queriesDave Airlie2018-01-103-18/+0
* r600/shader: only read back the necessary tess factor components.Dave Airlie2018-01-101-4/+4
* st/omx_bellagio: Update default intra matrix per MPEG2 specIndrajit Das2018-01-091-5/+5
* .gitignore: Ignore new generated filesScott D Phillips2018-01-081-0/+1
* meson: set opencl flags for r600Dylan Baker2018-01-081-2/+5
* meson: build cloverDylan Baker2018-01-085-2/+285
* meson: Turn on swr for relevant targetsDylan Baker2018-01-084-8/+6
* meson: Build SWR driverDylan Baker2018-01-083-0/+455
* ac: add load_tess_level() to the abiTimothy Arceri2018-01-091-0/+22
* radeonsi: add load_tess_level() helperTimothy Arceri2018-01-091-14/+19
* nvc0: enable bindless on keplerIlia Mirkin2018-01-071-3/+3
* nvc0: add bindless image support for keplerIlia Mirkin2018-01-0711-75/+272
* nvc0: add support for bindless textures on kepler+Ilia Mirkin2018-01-0710-5/+183
* nv50/ir: use the image info in the instruction rather than declIlia Mirkin2018-01-071-52/+24
* nvc0/ir: safen up lowering logic against overwriting reused valuesIlia Mirkin2018-01-071-2/+4
* nvc0: update tic in-place when buffer address changesIlia Mirkin2018-01-072-14/+21
* nvc0: ensure that pushbuf keeps ref to old text/tls bosIlia Mirkin2018-01-071-0/+13
* st/glsl_to_nir/radeonsi: enable tessellation shadersTimothy Arceri2018-01-051-0/+2
* gallium/tgsi: add patch support to tgsi_get_gl_varying_semantic()Timothy Arceri2018-01-051-3/+8
* radeonsi: add dummy implementation of si_nir_scan_tess_ctrl()Timothy Arceri2018-01-053-0/+23
* ac/radeonsi: add load_tess_coord() to the abiTimothy Arceri2018-01-051-17/+25
* radeonsi: make si_llvm_emit_tcs_epilogue compatible with emit_outputs abiTimothy Arceri2018-01-051-3/+7
* radeonsi/nir: gather tess propertiesTimothy Arceri2018-01-051-0/+29
* ac/radeonsi: add tcs_rel_ids to the abiTimothy Arceri2018-01-052-10/+10
* radeonsi: add unpack_llvm_param() helperTimothy Arceri2018-01-051-6/+12
* ac: add {tcs,tes}_patch_id to the abiTimothy Arceri2018-01-052-11/+8
* radeonsi: add nir support for tcs outputsTimothy Arceri2018-01-051-0/+118
* radeonsi: add si_nir_load_input_tcs()Timothy Arceri2018-01-051-0/+45
* radeonsi: add get_dw_address_from_generic_indices() helperTimothy Arceri2018-01-051-30/+46
* ac: add load_tes_inputs() to the abiTimothy Arceri2018-01-051-0/+1
* radeonsi: add si_nir_load_input_tes()Timothy Arceri2018-01-052-0/+59
* swr/rast: fix invalid sign masks in avx512 simdlib codeTim Rowley2018-01-043-3/+3
* radeonsi: fix alpha-to-coverage if color writes are disabledJózef Kucia2018-01-041-0/+3
* ac: rename has_sync_file to has_fence_to_handle.Bas Nieuwenhuizen2018-01-042-3/+3
* braodcom/vc5: Fix internal type/bpp for RGB10_A2UI images.Eric Anholt2018-01-031-0/+1
* broadcom/vc5: Try to fix up compressed texture load/store.Eric Anholt2018-01-031-2/+15
* broadcom/vc5: Fix image_h value for CPU-side tiling on miplevels > 1.Eric Anholt2018-01-031-1/+2
* broadcom/vc5: Disable early Z when the stencil func isn't ALWAYS.Eric Anholt2018-01-031-1/+3
* broadcom/vc5: Introduce enums for internal depth/type, with V3D prefixes.Eric Anholt2018-01-035-57/+57
* broadcom/vc5: Turn the output image format into an enum.Eric Anholt2018-01-031-45/+45
* broadcom/vc5: Emit flat shade flags for varying components > 24.Eric Anholt2018-01-031-5/+32
* broadcom/vc5: Emit proper flatshading code for glShadeModel(GL_FLAT).Eric Anholt2018-01-033-17/+3
* braodcom/vc5: Rely on OVRTMUOUT always being set.Eric Anholt2018-01-036-41/+70
* broadcom/vc5: Move texture return channel setup into the compiler.Eric Anholt2018-01-032-15/+8
* broadcom/vc5: Switch to setting the primitive list format in the RCL.Eric Anholt2018-01-032-5/+8
* broadcom/vc5: Switch to using the C++ interface for the simulator.Eric Anholt2018-01-035-8/+128
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 20:14:01 +0000