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Age
Files
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*
mesa: Enable subdir-objects globally.
Matt Turner
2015-06-26
11
-21
/
+0
*
ilo: define ILO_IMAGE_MAX_LEVEL_COUNT
Chia-I Wu
2015-06-26
4
-8
/
+16
*
ilo: replace pipe_format by gen_surface_format
Chia-I Wu
2015-06-26
13
-142
/
+174
*
ilo: always use the specified image format
Chia-I Wu
2015-06-26
4
-69
/
+115
*
ilo: replace pipe_texture_target by gen_surface_type
Chia-I Wu
2015-06-26
8
-125
/
+98
*
ilo: initialize ilo_image from ilo_image_info
Chia-I Wu
2015-06-26
3
-179
/
+242
*
ilo: remove ilo_image_disable_aux()
Chia-I Wu
2015-06-26
3
-28
/
+2
*
ilo: improve SURFTYPE_BUFFER validations
Chia-I Wu
2015-06-26
2
-81
/
+139
*
ilo: remove ilo_buffer
Chia-I Wu
2015-06-26
10
-68
/
+109
*
ilo: introduce ilo_vma
Chia-I Wu
2015-06-26
21
-315
/
+419
*
radeonsi: don't fail in si_shader_io_get_unique_index
Marek Olšák
2015-06-25
1
-2
/
+6
*
softpipe,llvmpipe: fix PIPE_SHADER_CAP_MAX_INPUTS value
Marek Olšák
2015-06-25
2
-2
/
+2
*
svga: silence warnings about unexpected shader type
Brian Paul
2015-06-24
1
-1
/
+3
*
st/wgl: add stw_nopfuncs.h to the sources lists
Emil Velikov
2015-06-24
1
-0
/
+1
*
winsys/radeon: reduce BO cache timeout
Grigori Goronzy
2015-06-24
1
-1
/
+1
*
winsys/radeon: align BO size to page size
Grigori Goronzy
2015-06-24
1
-0
/
+6
*
winsys/radeon: Unmap GPU VM address range when destroying BO
Michel Dänzer
2015-06-24
3
-4
/
+29
*
vc4: Also dump VC4_PACKET_LOAD_TILE_BUFFER_GENERAL.
Eric Anholt
2015-06-23
1
-2
/
+14
*
vc4: Add dumping for VC4_PACKET_LOAD/STORE_FULL_RES_TILE_BUFFER.
Eric Anholt
2015-06-23
2
-2
/
+38
*
vc4: Don't try to CSE color reads.
Eric Anholt
2015-06-23
1
-1
/
+2
*
vc4: Make a helper for TLB color writes, too.
Eric Anholt
2015-06-23
2
-1
/
+2
*
vc4: Pull the blending operation out to a separate function.
Eric Anholt
2015-06-23
1
-38
/
+50
*
vc4: Clarify size calculation for Z/S writes.
Eric Anholt
2015-06-23
1
-1
/
+1
*
vc4: Add an "args" temporary for RCL setup.
Eric Anholt
2015-06-23
1
-24
/
+24
*
vc4: Reuse (and extend) the packet.h sizes for dumping.
Eric Anholt
2015-06-23
2
-51
/
+58
*
vc4: Fix printfs for blit fallbacks.
Eric Anholt
2015-06-23
1
-3
/
+3
*
tgsi_to_nir: Fix translation of TXF on MSAA targets.
Eric Anholt
2015-06-23
1
-2
/
+10
*
nv50,nvc0: make sure to pushbuf_refn before putting bo into pushbuf_data
Ilia Mirkin
2015-06-23
4
-0
/
+4
*
nvc0: always put all tfb bufs into bufctx
Ilia Mirkin
2015-06-23
1
-3
/
+4
*
targets/libgl-xlib: fix the build against shared_glapi
Emil Velikov
2015-06-23
1
-0
/
+7
*
draw,tgsi: Assume TGSI_PROPERTY_GS_INVOCATIONS default of 1.
Jose Fonseca
2015-06-23
1
-0
/
+1
*
draw/gallivm: add invocation ID support for llvmpipe.
Dave Airlie
2015-06-23
5
-3
/
+14
*
draw/tgsi: implement geom shader invocation support.
Dave Airlie
2015-06-23
4
-18
/
+34
*
tgsi: handle indirect sampler arrays. (v2)
Dave Airlie
2015-06-23
1
-4
/
+38
*
ilo: emit 3DPRIMITIVE from gen6_3dprimitive_info
Chia-I Wu
2015-06-22
11
-87
/
+91
*
ilo: align vertex buffer size in buf_create()
Chia-I Wu
2015-06-22
2
-19
/
+20
*
ilo: move ilo_format.[ch] out of core
Chia-I Wu
2015-06-22
5
-8
/
+8
*
ilo: add ilo_state_surface_valid_format()
Chia-I Wu
2015-06-22
4
-284
/
+364
*
ilo: add ilo_state_vf_valid_element_format()
Chia-I Wu
2015-06-22
3
-124
/
+132
*
nvc0: use NV_VRAM_DOMAIN() macro
Alexandre Courbot
2015-06-22
11
-22
/
+27
*
nouveau: support for custom VRAM domains
Alexandre Courbot
2015-06-22
2
-0
/
+14
*
ilo: add ilo_state_compute
Chia-I Wu
2015-06-22
8
-92
/
+586
*
r600g: ignore sampler views for now.
Dave Airlie
2015-06-22
1
-0
/
+1
*
freedreno/ir3: pass sz to split_dest()
Rob Clark
2015-06-21
2
-5
/
+7
*
freedreno/ir3/nir: add more opcodes
Rob Clark
2015-06-21
1
-1
/
+8
*
freedreno/ir3: only unminify txf coords on a3xx
Rob Clark
2015-06-21
1
-1
/
+9
*
freedreno: remove int sampler shader variants
Rob Clark
2015-06-21
8
-104
/
+7
*
freedreno/ir3: block reshuffling and loops!
Rob Clark
2015-06-21
10
-126
/
+1025
*
freedreno/ir3: a4xx encodes larger immed offset
Rob Clark
2015-06-21
4
-7
/
+21
*
freedreno/ir3: simplify find_neighbors stop condition
Rob Clark
2015-06-21
1
-17
/
+1
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