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* tgsi/ureg: make the dst register match the src indirectionZack Rusin2013-05-032-4/+11
| | | | | | | | | | | In ureg src registers could have an indirect register that was either a temp or an addr register, while dst registers allowed only addr. That made moving between them a little difficult so make them behave the same way and allow temp's and addr registers as indirect files for both (tgsi supports it, just ureg didn't). Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* gallium: tgsi documentation updates and clarification for integer opcodes.Roland Scheidegger2013-05-031-73/+289
| | | | | | | A lot of them were missing. Others were moved from the Compute ISA to a new Integer ISA section as that seemed more appropriate. Reviewed-by: Jose Fonseca <[email protected]>
* llvmpipe: get rid of depth swizzling.Roland Scheidegger2013-05-037-273/+414
| | | | | | | | | | | | | | | Eliminating this we no longer need to copy between linear and swizzled layout. This is probably not quite ideal since it's a bit more work for now, could do some optimizations by moving depth testing outside the fragment shader loop (but tricky for early depth test as we don't have neither the mask nor the interpolated z in the right order handy). The large amount of tile/untile code is no longer needed will be deleted in next commit. No piglit regressions. v2: change a forgotten LAYOUT_NONE to LAYOUT_LINEAR. v3: fix (bogus) uninitialized variable warnings, add comments, fix a bad type Reviewed-by: Jose Fonseca <[email protected]>
* r600g: Correctly initialize the shader key, v2Lauri Kasanen2013-05-031-1/+2
| | | | | | | | | | | | | | | | | | | | | Assigning a struct only copies the members - any padding is left as is. Thus this code: struct foo_t foo; foo = bar; leaves the padding of foo intact, ie uninitialized random garbage. This patch fixes constant shader recompiles by initializing the struct to zero. For completeness, memcpy is used to copy the key to the shader struct. NOTE: This is a candidate for the stable branches. Signed-off-by: Lauri Kasanen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Andreas Boll <[email protected]>
* st/xvmc/tests: Fix build failure, v2Lauri Kasanen2013-05-031-1/+1
| | | | | | | | | v2: Removed extra libs as requested by Matt Turner. Signed-off-by: Lauri Kasanen <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Andreas Boll <[email protected]>
* scons: remove nouveau buildAndreas Boll2013-05-035-58/+0
| | | | | | | One build system for linux/unix only drivers should be enough. Additionally the nouveau target was disabled anyway. Acked-by: Jose Fonseca <[email protected]>
* scons: remove radeon buildAndreas Boll2013-05-039-185/+0
| | | | | | | | One build system for linux/unix only drivers should be enough. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48694 Acked-by: Jose Fonseca <[email protected]>
* r600g: don't emit surface_sync after FLUSH_AND_INV_EVENTAlex Deucher2013-05-031-26/+0
| | | | | | | | | | | | | | | | | It shouldn't be needed since the FLUSH_AND_INV_EVENT has already made sure the destination caches are flushed. Additionally, we didn't previously emit the surface_sync until this commit: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e5e4c07e7964a3258ed02b530bcdc24c0650204b Emitting them together causes hangs in compute on cayman/TN and hangs in Heaven on evergreen. Note: this patch is a candidate for the 9.1 branch, but requires: http://cgit.freedesktop.org/mesa/mesa/commit/?id=156bcca62c9f4e79e78929f72bc085757f36a65a as well. Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* r600g/sb: zero-initialize bytecode structsVadim Girlin2013-05-032-3/+6
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix constant propagation in gvn passVadim Girlin2013-05-031-1/+2
| | | | | | Fixes the bug that prevented propagation of literals in some cases. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: don't run unnecessary passesVadim Girlin2013-05-031-3/+0
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: silence warnings with gcc 4.8Vadim Girlin2013-05-032-14/+15
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix handling of interference sets in post_schedulerVadim Girlin2013-05-032-8/+8
| | | | | | | | | | | post_scheduler clears interference set for reallocatable values when the value becomes live first time, and then updates it to take into account modified order of operations, but this was not handled properly if the value appears first time as a source in copy operation. Fixes issues with webgl demo: http://madebyevan.com/webgl-water/ Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix allocation of indirectly addressed input arraysVadim Girlin2013-05-034-10/+25
| | | | | | | | | Some inputs may be preloaded into predefined GPRs, so we can't reallocate arrays with such inputs. Fixes issues with webgl demo: http://oos.moxiecode.com/js_webgl/snake/ Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: use hex instead of binary constantsVadim Girlin2013-05-035-15/+15
| | | | | | This should fix build issues with GCC < 4.3 Signed-off-by: Vadim Girlin <[email protected]>
* r600g: use old shader disassembler by defaultVadim Girlin2013-05-034-19/+18
| | | | | | | | | | | | | | New disassembler is not completely isolated yet from further processing in r600g/sb that is not required for printing the dump, so it has higher probability to fail in case of any unexpected features in the bytecode. This patch adds "sbdisasm" flag for R600_DEBUG that allows to use new disassembler in r600g/sb for shader dumps when shader optimization is not enabled. If shader optimization is enabled, new disassembler is used by default. Signed-off-by: Vadim Girlin <[email protected]>
* radeon/uvd: enable interlaced buffers by defaultChristian König2013-05-032-5/+5
| | | | | | Kills tilling on UVD buffers, but we currently don't really need that. Signed-off-by: Christian König <[email protected]>
* vl/idct: fix for commit 7d2f2a0c890b1993532a45c8c392c28950ddc06eChristian König2013-05-035-22/+27
| | | | | | | | We still need the option for handling 3D textures as well. Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=64143 Signed-off-by: Christian König <[email protected]>
* vl/buffers: fix typo in function nameChristian König2013-05-034-19/+19
| | | | Signed-off-by: Christian König <[email protected]>
* radeon/uvd: fix some MPEG4 artifactsChristian König2013-05-031-7/+17
| | | | | | Still not perfect, but a step in the right direction. Signed-off-by: Christian König <[email protected]>
* draw: Update for u_assembled_primitive -> u_assembled_prim rename.José Fonseca2013-05-031-1/+1
| | | | | | | | Mesa build is too complex to rely on successful builds. On refactorings it is always a good idea to use git grep to prevent missing cases: $ git grep u_assembled_primitive src/gallium/auxiliary/draw/draw_pt_fetch_shade_pipeline_llvm.c: u_assembled_primitive(in_prim);
* st/egl: fix bulid errors on Android 4.2Chia-I Wu2013-05-031-23/+62
| | | | | | | | | | The differences from the previous releases that affect st/egl are - logging macros are prefixed with an 'A' - dequeueBuffer() and enqueueBuffer() require an additoinal argument for fence fd, acquired from libsync Additionally, include gralloc_drm.h with extern "C".
* ilo: use u_reduced_prims_for_vertices()Chia-I Wu2013-05-031-68/+1
| | | | We do not need our own prim_count() anymore.
* util/prim: add u_reduced_prims_for_vertices()Chia-I Wu2013-05-031-0/+20
| | | | | | | | The function returns the number of reduced/tessellated primitives for the given vertex count. Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Zack Rusin <[email protected]>
* util/prim: assorted fixes for u_decomposed_prims_for_vertices()Chia-I Wu2013-05-031-11/+11
| | | | | | | | | | | Switch to '>=' for comparisons, and it becomes obvious that the comparison for PIPE_PRIM_QUAD_STRIP was wrong. Add minimum vertex count check for PIPE_PRIM_LINE_LOOP. Return 1 for PIPE_PRIM_POLYGON with 3 vertices. Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Zack Rusin <[email protected]>
* util/prim: use vertex count info in u_validate_pipe_prim()Chia-I Wu2013-05-031-32/+2
| | | | | | | As a side effect, primitives with adjacency are now correctly validated. Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Zack Rusin <[email protected]>
* util/prim: fix the name of the include guardChia-I Wu2013-05-031-2/+2
| | | | | | | It should be U_PRIM_H, not U_BLIT_H. Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Zack Rusin <[email protected]>
* draw: use u_assembled_prim() instead of u_assembled_primitive()Chia-I Wu2013-05-033-11/+3
| | | | | | | The latter function is also removed as a result of the change. Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Zack Rusin <[email protected]>
* util/prim: clean up and add commentsChia-I Wu2013-05-031-60/+107
| | | | | | | | | | | | | Move together (or add) functions to decompose/reduce/assemble a primitive, give them consistent names, and document them. Add u_prim_vertex_count() so that the vertex count information can be used elsewhere. u_assembled_primitive() will be removed in a folow-on commit. [olv: fix a warning when -Wold-style-declaration is enabled] Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Zack Rusin <[email protected]>
* util/prim: fix primitive trimming for triangles with adjacencyChia-I Wu2013-05-031-2/+2
| | | | | | | Fix for PIPE_PRIM_TRIANGLES_ADJACENCY and PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY. Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Zack Rusin <[email protected]>
* draw/gs: don't crash when vs/gs signatures don't matchZack Rusin2013-05-021-39/+54
| | | | | | | | | instead of crashing just fill zeros at the input slots that don't match, that's the mandated behavior and it avoids debug asserts. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: José Fonseca <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* tgsi: allow negation of all integer typesZack Rusin2013-05-023-8/+4
| | | | | | | | | | It's valid because we reuse certain arithmetic operations for both signed and unsigned types (e.g. uadd, umad, which have a bit unfortunate naming) Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: José Fonseca <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* r600g: Don't set the dest cache bits on surface sync for ↵Tom Stellard2013-05-021-15/+13
| | | | | | | | | | | | | R600_CONTEXT_FLUSH_AND_INV We are already emitting a EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT packet when this flush flag is set, so flushing the dest caches with a SURFACE_SYNC should not be necessary. The motivation for this change is that emitting a SURFACE_SYNC packet with the CB bits set was causing compute shaders to hang on Cayman. Reviewed-by: Alex Deucher <[email protected]>
* r600g/compute: Fix build error in debug codeTom Stellard2013-05-021-1/+1
| | | | Reviewed-by: Alex Deucher <[email protected]>
* radeon: Fix build with LLVM 3.3Armin K2013-05-021-1/+1
| | | | Reviewed-by: Tom Stellard <[email protected]>
* gallivm: Fix build with LLVM 3.3Armin K2013-05-021-1/+3
| | | | Reviewed-by: Tom Stellard <[email protected]>
* gallivm: Fix altivec intrinsics for 8xi16 add/subAdam Jackson2013-05-021-2/+2
| | | | Signed-off-by: Adam Jackson <[email protected]>
* r600/sb: Fix build failure with non-standard libdrm installation prefixLauri Kasanen2013-05-021-0/+1
| | | | | | Just like radeon/uvd, r600/sb fails to find the libdrm includes. Signed-off-by: Lauri Kasanen <[email protected]>
* radeon/uvd: Fix build failure with non-standard libdrm installation prefixLauri Kasanen2013-05-021-1/+1
| | | | | | | | | | Without this patch, radeon_uvd failed to find the libdrm includes: In file included from radeon_uvd.c:48: ../../winsys/radeon/drm/radeon_winsys.h:44:35: error: libdrm/radeon_surface.h: No such file or directory Signed-off-by: Lauri Kasanen <[email protected]>
* egl-static: use automake conditionals for defining FEATURE_{GL,ES1,ES2}Andreas Boll2013-05-011-1/+11
| | | | | | Removes the need of API_DEFINES. Reviewed-by: Matt Turner <[email protected]>
* radeon/uvd: fix quant scan order for mpeg2Christian König2013-05-011-2/+6
| | | | Signed-off-by: Christian König <[email protected]>
* st/vdpau: fix background handling in the mixerChristian König2013-05-011-9/+10
| | | | Signed-off-by: Christian König <[email protected]>
* vl/buffer: use 2D_ARRAY instead of 3D texturesChristian König2013-05-016-38/+40
| | | | Signed-off-by: Christian König <[email protected]>
* vl/compositor: cleanup background clearingChristian König2013-05-017-16/+14
| | | | | | Add an extra parameter to specify if we should clear the render target. Signed-off-by: Christian König <[email protected]>
* ilo: fix PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERSChia-I Wu2013-05-011-0/+2
| | | | On GEN7+, is->dev.has_gen7_sol_reset is required.
* ilo: enable SO support on GEN7Chia-I Wu2013-05-011-3/+4
|
* ilo: reset SO write offsets for new SO targetsChia-I Wu2013-05-011-6/+15
| | | | | When the SO targets are changed and no appending is requested, we need to send SOL_RESET on GEN7+.
* ilo: correctly program SO states for GEN7Chia-I Wu2013-05-011-7/+46
| | | | With the commands supported by GPE, we can finally program the states.
* ilo: implement GEN7 SO GPE functionsChia-I Wu2013-05-013-40/+150
| | | | They were just stubs before.
* ilo: add gen6_pipeline_update_max_svbi()Chia-I Wu2013-05-012-13/+35
| | | | | Move max_svbi calculation to a helper function and make it available for other GENs.
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