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* gallium/radeon: mark the gpu load thread stop trigger as volatileMarek Olšák2015-07-051-1/+1
* gallium: remove redundant pipe_context::fence_signalledMarek Olšák2015-07-0513-131/+0
* gallium: use fence_finish instead of fence_signalled in state trackersMarek Olšák2015-07-054-4/+4
* gallium: handle fence_finish timeout in various driversMarek Olšák2015-07-055-0/+15
* gallium/docs: remove out-of-date document about D3D11 featuresMarek Olšák2015-07-051-462/+0
* radeonsi: fix a hang with DrawTransformFeedback on 4 SE chipsMarek Olšák2015-07-051-0/+4
* nv50/ir: UCMP arguments are float, so make sure modifiers are appliedIlia Mirkin2015-07-031-1/+2
* winsys/radeon: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.Mario Kleiner2015-07-031-3/+10
* r600g: disable single-sample fast color clear due to hangsMarek Olšák2015-07-031-1/+6
* r600g,radeonsi: implement get_device_reset_statusMarek Olšák2015-07-036-4/+38
* freedreno/ir3: don't be confused by eliminated indirectsRob Clark2015-07-032-0/+14
* freedreno/ir3: sched fixes for addr register usageRob Clark2015-07-031-12/+65
* freedreno/ir3: fix indirects trackingRob Clark2015-07-035-10/+23
* gallium/ttn: mark location specially in nir for color0-writes-allIlia Mirkin2015-07-033-1/+16
* gallium/ttn: IN/OUT are only array if ArrayID != 0Rob Clark2015-07-031-62/+81
* tgsi: update docs for ArrayID usageRob Clark2015-07-031-0/+1
* nv50/ir: don't emit src2 in immediate formIlia Mirkin2015-07-021-2/+2
* nvc0: tune PREFER_BLIT_BASED_TEXTURE_TRANSFER capabilityAlexandre Courbot2015-07-011-1/+2
* nvc0: create screen fence objects with coherent attributeAlexandre Courbot2015-07-021-2/+6
* ilo: remove ilo_image_paramsChia-I Wu2015-07-011-75/+47
* ilo: add image_init_gen6_transfer_layout()Chia-I Wu2015-07-011-75/+37
* ilo: add image_set_gen6_bo_size()Chia-I Wu2015-07-013-118/+89
* ilo: add image_set_gen6_{hiz,mcs}Chia-I Wu2015-07-011-49/+61
* ilo: add image_get_gen6_monolithic_size()Chia-I Wu2015-07-011-67/+67
* ilo: add image_get_gen6_lods()Chia-I Wu2015-07-011-88/+148
* ilo: add image_get_gen{6,7}_alignment()Chia-I Wu2015-07-011-159/+177
* ilo: add image_get_gen6_{hiz,mcs}_enable()Chia-I Wu2015-07-011-101/+97
* ilo: add image_get_gen6_tiling()Chia-I Wu2015-07-011-132/+177
* ilo: add image_get_gen6_layout()Chia-I Wu2015-07-011-82/+107
* nv50/ir: copy joinAt when splitting both before and afterIlia Mirkin2015-07-013-0/+5
* gallivm: add fp64 support. (v2.1)Dave Airlie2015-07-018-31/+553
* tgsi: add infer support for double opcodes.Dave Airlie2015-07-011-0/+37
* freedreno: use consistent version string formatTimothy Arceri2015-07-011-1/+1
* nir/from_ssa: add a flag to not convert everything from SSAConnor Abbott2015-06-301-1/+1
* gallium/ttn: don't upset nir_validate w/ BRK'sRob Clark2015-06-301-1/+1
* gallium/ttn: add TXB2Rob Clark2015-06-301-0/+11
* gallium/ttn: partial fix for output arraysRob Clark2015-06-301-2/+4
* freedreno/ir3: cache defining instructionRob Clark2015-06-303-69/+91
* freedreno/ir3: fix RA issue with faninRob Clark2015-06-301-5/+15
* freedreno/ir3: add ir3_shader_disasm()Rob Clark2015-06-303-120/+124
* freedreno/a4xx: fix for sparse-samplersRob Clark2015-06-301-3/+7
* freedreno/ir3: fix crash in fail pathRob Clark2015-06-303-3/+12
* freedreno/ir3: fix crash in RARob Clark2015-06-301-2/+5
* freedreno/ir3: fixes for indirect writesRob Clark2015-06-303-4/+12
* freedreno/ir3: fix constlen in case of load_uniform_indirectRob Clark2015-06-301-0/+5
* nv50/ir: fix emission of address reg in 3rd sourceIlia Mirkin2015-06-301-2/+6
* nv30: align transfer stride to 64, required by blit, sifm transfer implsIlia Mirkin2015-06-291-2/+2
* nv30: allow vertex state creation with 0 elementsIlia Mirkin2015-06-291-2/+3
* nv30: reset fragprog bufctx at bind timeIlia Mirkin2015-06-291-1/+8
* nv30: modernize fp upload logicIlia Mirkin2015-06-291-10/+14
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