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* gallium/radeon: don't do (fmask.size && cmask.size)Marek Olšák2016-10-263-3/+3
| | | | | | fmask implies that cmask is present too. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: re-order radeon_surf::dcc and htile membersMarek Olšák2016-10-261-5/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: rename bo_size -> surf_size, bo_alignment -> surf_alignmentMarek Olšák2016-10-267-20/+20
| | | | | | these names were misleading. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove flags specific to libdrm_radeon from winsys interfaceMarek Olšák2016-10-263-15/+6
| | | | | | | These just say whether libdrm can assume that the latest radeon_surface definition is used by Mesa. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove r600_htile_infoMarek Olšák2016-10-263-38/+21
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove unnecessary fields from radeon_surf_levelMarek Olšák2016-10-267-37/+16
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: decrease the size of radeon_surfMarek Olšák2016-10-263-34/+36
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: pass pipe_resource and other params to surface_init directlyMarek Olšák2016-10-264-193/+179
| | | | | | | | | This removes input-only parameters from the radeon_surf structure. Some of the translation logic from pipe_resource to radeon_surf is moved to winsys/radeon. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeon/vce: use nblk_y instead of npix_yMarek Olšák2016-10-264-7/+7
| | | | | | | | | | | | npix_y will be removed. level[0].npix_y will be removed too. nblk_y should be the same as npix_y if the block height == 1. However, nblk_y is aligned to the tile size, so it can be greater than npix_y. If that's a problem, we'll have to save the input height of surface_init and use that. Reviewed-by: Christian König <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: define RADEON_SURF_MODE_* as enumsMarek Olšák2016-10-262-9/+14
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: stop using some input fields from radeon_surfaceMarek Olšák2016-10-264-20/+20
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fold r600_setup_surface into r600_init_surfaceMarek Olšák2016-10-261-38/+24
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: remove unused definitionsMarek Olšák2016-10-261-8/+0
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fold radeon_winsys::surface_best into radeon/winsysMarek Olšák2016-10-264-38/+9
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: use r600_gfx_write_event_eop everywhereMarek Olšák2016-10-263-23/+10
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: make r600_gfx_write_fence more genericMarek Olšák2016-10-264-14/+34
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix a ZPASS comment, EVENT_WRITE_EOP fixupsMarek Olšák2016-10-262-4/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: enable SDMA on Carrizo and all CIK chips againMarek Olšák2016-10-261-10/+0
| | | | | | | | SDMA might be fixed by: "winsys/amdgpu: fix radeon_surf::macro_tile_index for imported textures" Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: fix radeon_surf::macro_tile_index for imported texturesMarek Olšák2016-10-261-0/+17
| | | | | | | | | | | | | | | Maybe this is why SDMA has been broken for many amdgpu users? SDMA is the only block which is used with imported textures and relies on this variable. DB also uses it, but it doesn't get imported textures, so it's unaffected. I do get SDMA failures on Tonga before this patch if R600_DEBUG=testdma is changed to use imported textures. Cc: 11.2 12.0 13.0 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: make sure the address of separate CMASK is aligned properlyMarek Olšák2016-10-261-2/+3
| | | | | | | | This should fix random GPU hangs on Hawaii and Fiji. Cc: 11.2 12.0 13.0 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: fix incorrect bpe use in si_set_optimal_micro_tile_modeMarek Olšák2016-10-261-7/+7
| | | | | | | | Oh my god, I wonder what catastrophic issues this was causing on SI. Cc: 13.0 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* nir/i965/anv/radv/gallium: make shader info a pointerTimothy Arceri2016-10-264-10/+10
| | | | | | | | | | When restoring something from shader cache we won't have and don't want to create a nir_shader this change detaches the two. There are other advantages such as being able to reuse the shader info populated by GLSL IR. Reviewed-by: Jason Ekstrand <[email protected]>
* nv50/ir: start LocalCSE with getFirst to merge PHI instructionsKarol Herbst2016-10-251-1/+1
| | | | | | | | | | | | | | | total instructions in shared programs : 3499888 -> 3499445 (-0.01%) total gprs used in shared programs : 453866 -> 453803 (-0.01%) total local used in shared programs : 21621 -> 21621 (0.00%) total bytes used in shared programs : 32078952 -> 32074936 (-0.01%) local gpr inst bytes helped 0 39 119 119 hurt 0 0 0 0 Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nvc0: use correct bufctx when invalidating CP texturesSamuel Pitoiset2016-10-251-1/+1
| | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: "12.0 13.0" <[email protected]>
* gallium/stapi: fix comment for st_visual::buffer_maskBrian Paul2016-10-241-1/+1
| | | | Trivial.
* tgsi: trivial build fix for MSVCBrian Paul2016-10-241-1/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* nv50/ir: do not perform global membar for shared memorySamuel Pitoiset2016-10-241-1/+4
| | | | | | | | | | Shared memory is local to CTA, thus we should only wait for prior memory writes which are visible to other threads in the same CTA, and not at global level. This should speedup compute shaders which use shared memory. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* st/nine: Fix locking CubeTexture surfaces.Axel Davy2016-10-241-0/+1
| | | | | | | | | | Only one face of Cubetextures was locked when in DEFAULT Pool. Fixes: https://github.com/iXit/Mesa-3D/issues/129 CC: "12.0 13.0" <[email protected]> Signed-off-by: Axel Davy <[email protected]>
* st/nine: Fix mistake in Volume9 UnlockBoxAxel Davy2016-10-241-1/+1
| | | | | | | | | In the format fallback path, the height was used instead of the depth. CC: "12.0 13.0" <[email protected]> Signed-off-by: Axel Davy <[email protected]>
* st/nine: Use align_calloc instead of align_mallocAxel Davy2016-10-245-7/+7
| | | | | | | | | | We are not sure exactly what needs to be 0 initialized, but we are missing some cases. 0 initialize all our current aligned allocation. Fixes Tree of Savior visual issues. Signed-off-by: Axel Davy <[email protected]>
* gallium/util: Add align_callocAxel Davy2016-10-241-0/+8
| | | | | | | | | | | Add implementation for align_calloc, which is align_malloc + memset. v2: add if (ptr) before memset. Fix indentation. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/nine: Fix leak with integer and boolean constantsAxel Davy2016-10-241-21/+18
| | | | | | | | | | | | | | | Leak introduced by: a83dce01284f220b1bf932774730e13fca6cdd20 The patch also moves the part to release changed.vs_const_i and changed.vs_const_b before the if (!cb.buffer_size) check, to avoid reuploading every draw call if integer or boolean constants are dirty, but the shaders use no constants. Signed-off-by: Axel Davy <[email protected]> CC: "13.0" <[email protected]>
* tgsi/scan: scan texture offset operandsMarek Olšák2016-10-241-0/+16
| | | | | | This seems important considering how much we depend on some of the flags. Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi/scan: move src operand processing into a separate functionMarek Olšák2016-10-241-171/+183
| | | | | | the next commit will need this Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi/scan: get information about shader buffer usageMarek Olšák2016-10-242-0/+23
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi/scan: handle indirect image indexing correctlyMarek Olšák2016-10-242-8/+17
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi/scan: don't treat RESQ etc. as memory instructionsMarek Olšák2016-10-241-5/+13
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi/scan: get information about indirect 2D file accessMarek Olšák2016-10-242-0/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi/scan: get information about indirect CONST accessMarek Olšák2016-10-242-0/+15
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* nv50/ir: display OP_BAR subops in debug modeSamuel Pitoiset2016-10-241-0/+9
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: it appears that OP_DISCARD can't take a join modifierIlia Mirkin2016-10-221-0/+1
| | | | | | | nvdisasm does not print a .S even though the bit is set. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nv50/ir: use levelZero for non-frag tex/txp opsIlia Mirkin2016-10-221-0/+5
| | | | | | | | | radeonsi also does the same thing. I suspect that this is likely to be a no-op in reality, but it brings nouveau code closer to what the blob produces. Plus it makes sense to not try to do auto-derivatives on this. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* gallium: add PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERSIlia Mirkin2016-10-2217-0/+19
| | | | | | | | | | | | | | This allows the driver to signal that it can't handle random interleaving of attributes across buffers. This is required for ARB_transform_feedback3, and it's initialized to whatever the previous value of PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME was except for nv50 where it is disabled. Note that the proprietary drivers never expose ARB_transform_feedback3 on any GT21x's (where nouveau previously did), and after some effort I was unable to get it to work. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* nvc0/ir: remove outdated comment about SHLADDSamuel Pitoiset2016-10-222-2/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* vc4: Avoid making temporaries for assignments to NIR registers.Eric Anholt2016-10-211-35/+79
| | | | | | | | | | | | | | | | | | | | | | | Getting stores to NIR regs to not generate new MOVs is tricky, since the result we're trying to store into the NIR reg may have been from a conditional update of a temp, or a series of packed writes. The easiest solution seems to be to require that nir_store_dest()'s arg comes from an SSA temp. This causes us to put in a few more temporary MOVs in the NIR SSA dest case, but copy propagation successfully cleans those up. The shader-db change is modest: total instructions in shared programs: 93774 -> 93598 (-0.19%) instructions in affected programs: 14760 -> 14584 (-1.19%) total estimated cycles in shared programs: 212135 -> 211946 (-0.09%) estimated cycles in affected programs: 27005 -> 26816 (-0.70%) but I was seeing patterns in some register-allocation failures in DEQP tests that looked like the extra MOVs would increase maximum register pressure in loops. Some debug code indicates that that's not the case, though I'm still a bit confused by that result.
* vc4: Add a comment with discussion of how simulation works.Eric Anholt2016-10-211-0/+25
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* vc4: Move simulator winsys mapping and tracking to the simulator.Eric Anholt2016-10-213-20/+56
| | | | | One tiny hack is left in vc4_bufmgr.c for what kind of mapping we got so that we can free it.
* vc4: Move simulator memory management to a u_mm.h heap.Eric Anholt2016-10-215-41/+208
| | | | | | Now we aren't limited to 256MB total allocated across a driver instance, just 256MB at one time. We're still copying in and out, which should get fixed.
* vc4: Move simulator globals into a struct.Eric Anholt2016-10-212-34/+29
| | | | | I would like to put a couple more things in here, so it's time to package it up.
* vc4: Restructure the simulator mode.Eric Anholt2016-10-215-84/+182
| | | | | | | | | | | | | Rather than having simulator mode changes scattered around vc4_bufmgr.c and vc4_screen.c, make vc4_bufmgr.c just call a vc4_simulator_ioctl, which then dispatches to a corresponding implementation. This will give the simulator support a centralized place to do tricks like storing most BOs directly in simulator memory rather than copying in and out. This leaves special casing of mmaping BOs and execution, because of the winsys mapping.
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