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* nv50,nvc0: fix BGR10_A2UI vertex formatIlia Mirkin2016-06-051-1/+1
* nvc0: do not clear surfaces bins in the validate functionSamuel Pitoiset2016-06-052-5/+2
* nvc0: re-validate images after launching a grid on FermiSamuel Pitoiset2016-06-051-0/+3
* radeonsi: fix images with level > 0Marek Olšák2016-06-051-1/+1
* nvc0: reduce overhead from always marking images dirtyIlia Mirkin2016-06-041-9/+36
* nvc0: reduce overhead from always marking buffers dirtyIlia Mirkin2016-06-041-6/+20
* nvc0: fix memory barrier flag handlingIlia Mirkin2016-06-041-9/+16
* nvc0: mark bound buffer range validIlia Mirkin2016-06-043-0/+9
* gallium/radeon: don't use the DMA ring for pipelined buffer uploadsMarek Olšák2016-06-041-5/+4
* r600g: don't flush caches when binding shader resourcesMarek Olšák2016-06-044-31/+26
* r600g: only do necessary cache flushes in cp_dma_copy_bufferMarek Olšák2016-06-041-14/+1
* r600g: only do necessary cache flushes in cp_dma_clear_bufferMarek Olšák2016-06-042-14/+18
* r600g: remove a CP DMA workaround that's not needed anymoreMarek Olšák2016-06-041-6/+0
* r600g: fix CP DMA hazard with index buffer fetches (v3)Marek Olšák2016-06-047-7/+93
* r600g: properly sync CP with CP DMA on R6xxMarek Olšák2016-06-041-1/+8
* r600g: write WAIT_UNTIL in the correct placeMarek Olšák2016-06-041-8/+11
* gallium/radeon: rename allocator_so_filled_size -> allocator_zeroed_memoryMarek Olšák2016-06-043-6/+6
* gallium/u_suballoc: allow different alignment for each allocationMarek Olšák2016-06-048-21/+20
* freedreno/ir3: do idiv lowering after main opt loopRob Clark2016-06-031-16/+27
* radeonsi: mark buffer texture range valid for shader imagesNicolai Hähnle2016-06-031-0/+23
* nvc0: mark buffer texture range valid for shader imagesSamuel Pitoiset2016-06-033-0/+31
* svga: allow copy box in svga_transfer_dma_band()Charmaine Lee2016-06-021-13/+20
* freedreno: fix bad bitshift warningsRob Clark2016-06-021-0/+2
* freedreno: assume builtin shaders do compileRob Clark2016-06-021-1/+2
* freedreno/a4xx: silence coverity warningRob Clark2016-06-021-0/+6
* freedreno/a3xx+a4xx: fix potential null ptr derefRob Clark2016-06-022-2/+4
* freedreno/ir3: fix coverity warningRob Clark2016-06-021-1/+3
* freedreno/ir3: use nir_shader_get_entrypoint() helperRob Clark2016-06-021-10/+1
* freedreno/a4xx: fix incorrect enum typeRob Clark2016-06-021-1/+1
* freedreno: fix coverity negative array index warningRob Clark2016-06-021-0/+2
* freedreno: fix dereference before null checkRob Clark2016-06-021-2/+1
* gallium/util: remove u_stagingRob Clark2016-06-023-205/+0
* freedreno/a3xx: only update/emit bordercolor state when neededRob Clark2016-06-023-17/+27
* freedreno/a4xx: only update/emit bordercolor state when neededRob Clark2016-06-023-17/+26
* st/osmesa: remove double-write (overwriting)Eric Engestrom2016-06-021-1/+0
* st/vdpau: check for null pointer in get/put bits.Nayan Deshmukh2016-06-022-0/+12
* radeon/uvd: fix the H264 level for Tonga v2Christian König2016-06-021-1/+1
* winsys/amdgpu: decay max_ib_size over timeNicolai Hähnle2016-06-011-0/+2
* winsys/amdgpu: implement IB chaining on the gfx ringNicolai Hähnle2016-06-012-18/+109
* winsys/amdgpu: consolidate IB size management in amdgpu_ib_finalizeNicolai Hähnle2016-06-011-9/+9
* radeon/winsys: introduce radeon_winsys_cs_chunkNicolai Hähnle2016-06-0111-75/+98
* radeonsi/sid: add packet definitions for IB chainingNicolai Hähnle2016-06-012-0/+15
* winsys/amdgpu: start with smaller IBs, growing as necessaryNicolai Hähnle2016-06-012-10/+71
* winsys/amdgpu: add amdgpu_ib and amdgpu_cs_from_ib helper functionsNicolai Hähnle2016-06-012-7/+37
* winsys/amdgpu: extract IB big buffer allocation for re-useNicolai Hähnle2016-06-011-17/+29
* winsys/amdgpu: add IB buffer in amdgpu_get_new_ibNicolai Hähnle2016-06-011-121/+113
* gallium/radeon: use cs_check_space throughoutNicolai Hähnle2016-06-015-10/+7
* radeon/winsys: add cs_check_spaceNicolai Hähnle2016-06-013-0/+23
* winsys/amdgpu: simplify interface of amdgpu_get_new_ibNicolai Hähnle2016-06-012-14/+14
* winsys/amdgpu: add amdgpu_cs_has_user_fenceNicolai Hähnle2016-06-011-4/+8
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