| Commit message (Collapse) | Author | Age | Files | Lines |
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And si_tex_aniso_filter is unused.
v2: remove INLINE occurences
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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This gets rid of another file.
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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v2: added fprintf to r600_get_llvm_processor_name
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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radeonsi now reports PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE = true if UVD support
isn't available. It's what all the other drivers do.
Also, some #include directives were missing in radeon_uvd.h.
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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This enables more queries for the Gallium HUD with radeonsi.
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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To follow the unwritten convention of r600g and radeonsi.
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Implemented by the common code. You can now visualize the statistics
with the HUD, see GALLIUM_HUD=help for all available queries. For example:
GALLIUM_HUD=clipper-primitives-generated
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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for (;;) {
} while ();
I was surprised to see such a statement.
Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Reviewed-by: Michel Dänzer <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Conversion of Type P formats as follows (w/related comment fixes):
s/MESA_FORMAT_RGB565\b/MESA_FORMAT_B5G6R5_UNORM/g
s/MESA_FORMAT_RGB565_REV\b/MESA_FORMAT_R5G6B5_UNORM/g
s/MESA_FORMAT_ARGB4444\b/MESA_FORMAT_B4G4R4A4_UNORM/g
s/MESA_FORMAT_ARGB4444_REV\b/MESA_FORMAT_A4R4G4B4_UNORM/g
s/MESA_FORMAT_RGBA5551\b/MESA_FORMAT_A1B5G5R5_UNORM/g
s/MESA_FORMAT_XBGR8888_SNORM\b/MESA_FORMAT_R8G8B8X8_SNORM/g
s/MESA_FORMAT_XBGR8888_SRGB\b/MESA_FORMAT_R8G8B8X8_SRGB/g
s/MESA_FORMAT_ARGB1555\b/MESA_FORMAT_B5G5R5A1_UNORM/g
s/MESA_FORMAT_ARGB1555_REV\b/MESA_FORMAT_A1R5G5B5_UNORM/g
s/MESA_FORMAT_AL44\b/MESA_FORMAT_L4A4_UNORM/g
s/MESA_FORMAT_RGB332\b/MESA_FORMAT_B2G3R3_UNORM/g
s/MESA_FORMAT_ARGB2101010\b/MESA_FORMAT_B10G10R10A2_UNORM/g
s/MESA_FORMAT_Z24_S8\b/MESA_FORMAT_S8_UINT_Z24_UNORM/g
s/MESA_FORMAT_S8_Z24\b/MESA_FORMAT_Z24_UNORM_S8_UINT/g
s/MESA_FORMAT_X8_Z24\b/MESA_FORMAT_Z24_UNORM_X8_UINT/g
s/MESA_FORMAT_Z24_X8\b/MESA_FORMAT_X8Z24_UNORM/g
s/MESA_FORMAT_RGB9_E5_FLOAT\b/MESA_FORMAT_R9G9B9E5_FLOAT/g
s/MESA_FORMAT_R11_G11_B10_FLOAT\b/MESA_FORMAT_R11G11B10_FLOAT/g
s/MESA_FORMAT_Z32_FLOAT_X24S8\b/MESA_FORMAT_Z32_FLOAT_S8X24_UINT/g
s/MESA_FORMAT_ABGR2101010_UINT\b/MESA_FORMAT_R10G10B10A2_UINT/g
s/MESA_FORMAT_XRGB4444_UNORM\b/MESA_FORMAT_B4G4R4X4_UNORM/g
s/MESA_FORMAT_XRGB1555_UNORM\b/MESA_FORMAT_B5G5R5X1_UNORM/g
s/MESA_FORMAT_XRGB2101010_UNORM\b/MESA_FORMAT_B10G10R10X2_UNORM/g
s/MESA_FORMAT_AL88\b/MESA_FORMAT_L8A8_UNORM/g
s/MESA_FORMAT_AL88_REV\b/MESA_FORMAT_A8L8_UNORM/g
s/MESA_FORMAT_AL1616\b/MESA_FORMAT_L16A16_UNORM/g
s/MESA_FORMAT_AL1616_REV\b/MESA_FORMAT_A16L16_UNORM/g
s/MESA_FORMAT_RG88\b/MESA_FORMAT_G8R8_UNORM/g
s/MESA_FORMAT_GR88\b/MESA_FORMAT_R8G8_UNORM/g
s/MESA_FORMAT_GR1616\b/MESA_FORMAT_R16G16_UNORM/g
s/MESA_FORMAT_RG1616\b/MESA_FORMAT_G16R16_UNORM/g
s/MESA_FORMAT_SRGBA8\b/MESA_FORMAT_A8B8G8R8_SRGB/g
s/MESA_FORMAT_SARGB8\b/MESA_FORMAT_B8G8R8A8_SRGB/g
s/MESA_FORMAT_SLA8\b/MESA_FORMAT_L8A8_SRGB/g
Conflicts:
src/mesa/drivers/dri/i965/brw_surface_formats.c
src/mesa/main/format_pack.c
src/mesa/main/format_unpack.c
src/mesa/main/formats.c
src/mesa/main/texformat.c
src/mesa/main/texstore.c
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Change all 4 color component unsigned byte formats to meet spec for P
Type formats:
s/MESA_FORMAT_RGBA8888\b/MESA_FORMAT_A8B8G8R8_UNORM/g
s/MESA_FORMAT_RGBA8888_REV\b/MESA_FORMAT_R8G8B8A8_UNORM/g
s/MESA_FORMAT_ARGB8888\b/MESA_FORMAT_B8G8R8A8_UNORM/g
s/MESA_FORMAT_ARGB8888_REV\b/MESA_FORMAT_A8R8G8B8_UNORM/g
s/MESA_FORMAT_RGBX8888\b/MESA_FORMAT_X8B8G8R8_UNORM/g
s/MESA_FORMAT_RGBX8888_REV\b/MESA_FORMAT_R8G8B8X8_UNORM/g
s/MESA_FORMAT_XRGB8888\b/MESA_FORMAT_B8G8R8X8_UNORM/g
s/MESA_FORMAT_XRGB8888_REV\b/MESA_FORMAT_X8R8G8B8_UNORM/g
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s/\bgl_format\b/mesa_format/g. Use better name for Mesa Formats enum
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This is necessary to prevent the next SURFACE_SYNC packet from
hanging the GPU.
https://bugs.freedesktop.org/show_bug.cgi?id=73418
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
CC: "9.2" "10.0" <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Some of the hardware support is missing. The NVIDIA-provided driver,
which claims seamless cube map support fails the relevant tests as well.
As this is the last extension before we can have OpenGL 3.2, doing this
allows us to expose geometry shaders without doing the additional
work involved in supporting ARB_geometry_shader4.
Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Creates two areas in the AUX constbuf:
- Sample offsets for MS textures
- Per-texture MS settings
When executing a texelFetch with a MS sampler, looks up that texture's
settings and adjusts the parameters given to the texfetch instruction.
With this change, all the ARB_texture_multisample piglits pass, so turn
on PIPE_CAP_TEXTURE_MULTISAMPLE.
Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Updates a few inconsistencies as well, like the size of the buffer,
location of the runout, etc.
Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Fixes most of the tests/spec/gl-3.2/layered-rendering/* piglits.
Signed-off-by: Ilia Mirkin <[email protected]>
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Each code BO is a heap that allocates at the end first, and so GPs are
allocated at the very end of the allocated space. When executing, we see
PAGE_NOT_PRESENT errors for the next page. Just over-allocate to make
sure that there's something there.
Signed-off-by: Ilia Mirkin <[email protected]>
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Set max_out to 1 when there are no outputs.
Signed-off-by: Ilia Mirkin <[email protected]>
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Make sure that we never try to use a 0-sized map. This can happen when
using a gp, so add a dummy mapping when computing vp_gp_mapping in that
case.
Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Marks gl_Layer as only having one component, and makes sure to keep
track of where it is and emit it in the output map, since it is not an
input to the FP.
Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Note that the primitive id is stored in a[0x18], while usually the
geometry instructions are of the form a[$a1 + 0x4] which gets mapped to
p[] space. We need to avoid the change from a[] to p[] here, so it's
keyed on whether the access is indirect or not.
Note that there's also a use-case for accessing e.g. a[$r1], however
that's not supported for now. (Could be added by checking the register
file of the indirect parameter.)
Signed-off-by: Ilia Mirkin <[email protected]>
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This only works for up to $a3, hopefully we won't go that high.
Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Layer output probably doesn't work yet, but other than that everything seems
to be working.
Signed-off-by: Bryan Cain <[email protected]>
[calim: fix up minor bugs, code formatting]
Signed-off-by: Christoph Bumiller <[email protected]>
Signed-off-by: Ilia Mirkin <[email protected]>
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Instead of emitting an SHL 4 io an address register on the TGSI ARL and UARL
instructions, emit the shift when the loaded address is actually used. This
is necessary because input vertex and attribute indices in geometry shaders on
nv50 need to be shifted left by 2 instead of 4.
Signed-off-by: Bryan Cain <[email protected]>
[calim: various updates to the indirect address logic]
Signed-off-by: Christoph Bumiller <[email protected]>
[imirkin: remove OP_MAD change that calim made, add OP_RESTART handling
same as OP_EMIT for code flow analysis]
Signed-off-by: Ilia Mirkin <[email protected]>
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Signed-off-by: Ilia Mirkin <[email protected]>
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Fixes fbo-drawbuffers-none glClearBuffer piglit test.
Signed-off-by: Ilia Mirkin <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
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This is needed since commit 9baa45f78b (st/mesa: bind NULL colorbuffers
as specified by glDrawBuffers).
This implementation is highly based on a larger commit by
Christoph Bumiller <[email protected]> in his gallium-nine
branch.
Signed-off-by: Ilia Mirkin <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
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