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* nvc0: bind constant buffers for compute on FermiSamuel Pitoiset2016-02-215-13/+81
| | | | | | | | | | | | | | | Loosely based on 3D. Changs from v3: - invalidate COMPUTE CBs after validating 3D CBs because they are aliased Changes from v2: - get rid of the 's' param to nvc0_cb_bo_push() because it doesn't matter to upload constbufs for compute using the 3d chan Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: allocate an area for compute user constbufsSamuel Pitoiset2016-02-214-18/+20
| | | | | | | For compute shaders, we might need to upload uniforms. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50: do not advertise about compute shadersSamuel Pitoiset2016-02-201-1/+1
| | | | | | | | | Compute shaders are totally unsupported. This avoids Clover to report that OpenCL is supported on Tesla because it's a lie. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Pierre Moreau <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* llvmpipe: add a few const qualifiersBrian Paul2016-02-193-4/+4
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* trace: assorted whitespace and formatting fixesBrian Paul2016-02-191-29/+31
| | | | Reviewed-by: Eduardo Lima Mitev <[email protected]>
* trace: remove unneeded inline qualifiersBrian Paul2016-02-191-46/+46
| | | | Reviewed-by: Eduardo Lima Mitev <[email protected]>
* svga: allow non-contiguous VS input declarationsBrian Paul2016-02-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | This fixes a glDrawPixels regression since b63fe0552b5f. The new quad-drawing utility code uses 3 vertex attributes (xyz, rgba, st). For glDrawPixels path we don't use the rgba attribute so there's a gap in the TGSI VS input declarations (INPUT[0] = pos, INPUT[2] = texcoord). The TGSI->VGPU10 translations code did not handle this correctly. I missed this because my VM was configured for HWv11 while testing. Another way to fix this would be to change the tgsi_scan.c code so that the tgsi_shader_info::num_inputs (and num_outputs) included the unused inputs/outputs. These counts would then actually be "max input register index + 1" rather than "number of used inputs". But that change could impact all drivers so put it off for now. No regressions found with piglit or typical GL apps. v2: also update alloc_system_value_index() to use info.file_max[] Reviewed-by: Charmaine Lee <[email protected]>
* gallivm: Check whether to stop disassemble only for x86Oded Gabbay2016-02-191-0/+2
| | | | | | | | | | Because the if statement that checks whether we have a return statement is valid only on x86, surround it with X86 or X86-64 arch defines Signed-off-by: Oded Gabbay <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: use sstream for dissasemblingOded Gabbay2016-02-191-21/+30
| | | | | | | | | | | | | Currently, disassemble() directly prints to stdout. This has broke the profiling support for llvmpipe JIT code. This patch redirects the output to an sstream object, which is then either gets printed to stdout (for assembly debugging) or gets written to a file in /tmp/ (for profiling support). Signed-off-by: Oded Gabbay <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* trace: fix new gcc6 warningsRob Clark2016-02-181-7/+0
| | | | | | | | | | | | | | | | src/gallium/drivers/trace/tr_context.c:1713:39: warning: ‘rbug_blocker_flags’ defined but not used [-Wunused-const-variable] static const struct debug_named_value rbug_blocker_flags[] = { ^~~~~~~~~~~~~~~~~~ Note that use of rbug_blocker_flags was removed in: commit 5494332128da0b2826e85df5eeaa878bb5c30a4e Author: Jakob Bornecrantz <[email protected]> Date: Wed May 12 19:26:19 2010 +0100 trace: Remove rbug from trace Signed-off-by: Rob Clark <[email protected]>
* gallium/auxiliary: fix new gcc6 warningsRob Clark2016-02-181-2/+2
| | | | | | | | | | | | | | src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c: In function ‘mm_bufmgr_create_from_buffer’: src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c:288:4: warning: statement is indented as if it were guarded by... [-Wmisleading-indentation] if(mm->map) ^~ src/gallium/auxiliary/pipebuffer/pb_bufmgr_mm.c:286:1: note: ...this ‘if’ clause, but it is not if(mm->heap) ^~ Signed-off-by: Rob Clark <[email protected]>
* gallium/hud: fix new gcc6 warningsRob Clark2016-02-181-0/+2
| | | | | | | | | | | | src/gallium/auxiliary/hud/font.c:234:22: warning: ‘Fixed8x13_Character_159’ defined but not used [-Wunused-const-variable] static const GLubyte Fixed8x13_Character_159[] = { 9, 0, 0, 0, 0, 0, 0,170, 0, 0, 0,130, 0, 0, 0,130, 0, 0, 0,130, 0, 0, 0,170, 0, 0, 0, 0, 0}; ^~~~~~~~~~~~~~~~~~~~~~~ .... many more.. These are simply unused, just #if 0 them out for now, in case someone wants to use them in the future. Signed-off-by: Rob Clark <[email protected]>
* gallium/cso: only enable compute shaders when TGSI is supportedSamuel Pitoiset2016-02-181-1/+6
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94186 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallivm, tgsi: provide fake sample_i_ms implementationsRoland Scheidegger2016-02-182-4/+11
| | | | | | | Just like the rest of the msaa "implementation" it's just fake for now... Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* radeon/llvm: Add TargetLibraryInfo to the pass managerTom Stellard2016-02-171-1/+7
| | | | | | | | This will prevent optimization passes from introducing unsupported library calls. Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/llvm: Set the target triple on the moduleTom Stellard2016-02-174-4/+12
| | | | | Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallivm: Add helpers for creating and destroying TargetLibraryInfoTom Stellard2016-02-172-0/+37
| | | | | | | This functionality is not exposed via the LLVM C API. Tested-by: Michel Dänzer <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* nvc0: invalidate all buffers when switching pipe contextsSamuel Pitoiset2016-02-171-0/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* freedreno: expose time-elapsed queryRob Clark2016-02-172-1/+5
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: implement time-elapsed queryRob Clark2016-02-172-0/+133
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: better occlusion/sample countingRob Clark2016-02-171-1/+6
| | | | | | | | | | This seems to give more reliable results. More similar to what we do on a3xx, although I think it breaks the a3xx theory that the four sets of results map to each MRT (since we appear to still only have four sets on a4xx). The divide-by-two is a bit odd, but seems to be needed for some reason. Signed-off-by: Rob Clark <[email protected]>
* freedreno/query: fix refcnt'ing issueRob Clark2016-02-171-1/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/query: some queries don't have ->begin_query()Rob Clark2016-02-172-0/+18
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/query: align counter snapshot locationsRob Clark2016-02-171-0/+2
| | | | | | | | | | | | Some hw queries need their sample memory locations to have certain alignment. At the moment that isn't an issue, since the only hw query is occlusion, so all samples have the same size. But when others are added with different sample sizes, this starts to be a problem. All current and immediately upcoming hw queries simply need their sample address aligned to their size, so let's use that for now. Signed-off-by: Rob Clark <[email protected]>
* freedreno/query: add optional enable hookRob Clark2016-02-175-0/+36
| | | | | | | | Add enable hook for hw query providers. Some will need to configure perfctr selector registers, which we want to do at the start of the submit. Signed-off-by: Rob Clark <[email protected]>
* freedreno: query max gpu freqRob Clark2016-02-172-0/+11
| | | | | | | | This will be needed to support converting from cycle counts to time for performance related queries (initially time-elapsed, but there are some additional performance counters that could be wired up). Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2016-02-175-30/+1355
| | | | | | Mostly to pull in perf ctrs. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix new gcc6 errorsRob Clark2016-02-171-1/+0
| | | | | | | | | | | | | | | | src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c: In function ‘emit_tex’: src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c:1368:26: warning: unused variable ‘const_off’ [-Wunused-variable] struct ir3_instruction *const_off[4]; ^~~~~~~~~ unused since: commit 8750299a420af76cebd3067f6f603eacde06ae06 Author: Jason Ekstrand <[email protected]> Date: Tue Feb 9 14:51:28 2016 -0800 nir: Remove the const_offset from nir_tex_instr Signed-off-by: Rob Clark <[email protected]>
* nv50/ir: we can't do the add to mad conversion when the mul saturatesKarol Herbst2016-02-161-0/+3
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: optimize neg(and(set, 1)) to setKarol Herbst2016-02-161-0/+32
| | | | | | | | | | | | | | | | | | | helps shaders in saints row IV, bioshock infinite and shadow warrior total instructions in shared programs : 1914931 -> 1903900 (-0.58%) total gprs used in shared programs : 247920 -> 247785 (-0.05%) total local used in shared programs : 5673 -> 5673 (0.00%) total bytes used in shared programs : 17558272 -> 17457320 (-0.57%) local gpr inst bytes helped 0 137 719 719 hurt 0 12 0 0 v2: remove this opt for OP_SLCT and check against float for OP_SET v3: simplified the code Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: fix quadop emission in the presence of predicationIlia Mirkin2016-02-164-5/+9
| | | | | | | | | | | | When there's a predicate, it just goes onto the sources list. If the quadop only has a single regular source, we will end up thinking that the predicate is the second source. Check explicitly for the predSrc so that we don't accidentally emit the wrong thing. This fixes a bunch of dEQP-GLES3.functional.shaders.derivate.* tests. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nv50,nvc0: enable/disable seamless cubemap texturing as requestedIlia Mirkin2016-02-1612-3/+26
| | | | | | | | | | In a situation where the seamless setting isn't available on a per-texture basis (G200+ Teslas, and all Fermis), assume that all samplers will have it identically set, and enable accordingly. This fixes arb_seamless_cubemap piglit test on Fermi and Tesla. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: enable compute support on GK110:GM200 with an envvarSamuel Pitoiset2016-02-161-2/+7
| | | | | | | | | | | | | Without this NVF0_COMPUTE environment variable, compute support is initialized by default and this is not what we want for now because it might break 3D. It will be enabled by default once we are sure it won't break anything. Please note that compute support on GM200+ is not enabled yet because it needs to be double-checked. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: add compute support for GM107Samuel Pitoiset2016-02-162-1/+5
| | | | | | | | Fortunately, compute support on GM107 is very close to GK110, except the GK110_COMPUTE.UNK02C4 which is invalid and should not be used. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: fix compute state initialization on GK110+Samuel Pitoiset2016-02-161-6/+7
| | | | | | | | | | | Because our firmware doesn't support the GK110_COMPUTE.FIRMWARE[0x6] method the GPU hangs when it is used. Removing it fix the issue and allow to launch compute shaders on GK110+. Tested on GK208 and GM107. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gm107/ir: add ATOM CAS emissionSamuel Pitoiset2016-02-161-15/+27
| | | | | | | | | This fixes the following dEQP test and the other compswap variants. dEQP-GLES31.functional.ssbo.atomic.compswap.highp_int Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* cso: add CSO_BITS_ALL_SHADERSBrian Paul2016-02-161-0/+6
| | | | | | For saving/restoring all shader stages. Reviewed-by: Marek Olšák <[email protected]>
* cso: make most of the cso_save/restore_x() functions staticBrian Paul2016-02-162-85/+70
| | | | | | | Users of the CSO save/restore facility all use the new cso_save/restore_state() functions instead. Reviewed-by: Jose Fonseca <[email protected]>
* postprocess: use new cso_save/restore_state() functionsBrian Paul2016-02-161-38/+20
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* gallium/hud: use new cso_save/restore_state() functionsBrian Paul2016-02-161-37/+19
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* gallium/util: use new cso_save/restore_state() functionsBrian Paul2016-02-161-34/+18
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* cso: add new cso_save/restore_state() functionsBrian Paul2016-02-162-0/+133
| | | | | | | cso_save_state() takes a bitmask of state items to save. Calling cso_restore_state() restores those states. Reviewed-by: Jose Fonseca <[email protected]>
* cso: remove commentBrian Paul2016-02-161-1/+0
| | | | There's a similar comment just a few lines before.
* cso: add new cso_set_viewport_dims() helperBrian Paul2016-02-162-0/+20
| | | | | | To simplify some viewport setting code in the state tracker. Reviewed-by: Jose Fonseca <[email protected]>
* Handle removal of LLVMAddTargetData in SVN revision 260919Matthew Dawson2016-02-162-0/+8
| | | | | | | | | | | | | | | | | | | LLVM removed LLVMAddTargetData for the 3.9 release in r260919. For the two places in mesa where this is called, only enable the lines when compiling for less then 3.9. For the radeon driver, I'm not sure how to check if any other LLVM calls need to be adjusted. I think since the target data used is extracted from the LLVMModule, it isn't necessary to pass it back to LLVM again. The code does compile, and at least for radeonsi does run OpenGL games. [ Michel Dänzer: Move #if closer to LLVMAddTargetData in lp_bld_init.c, and add HAVE_LLVM < 0x0309 guards around now unused occurrences of TD and data_layout ] Signed-off-by: Matthew Dawson <[email protected]> Reviewed-and-Tested-by: Michel Dänzer <[email protected]>
* nvc0: initial support for GM20x GPUsBen Skeggs2016-02-165-0/+11
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: implement support for maxwell texture headersBen Skeggs2016-02-163-6/+203
| | | | | | | | | | | | | Adds support for the new TIC layout that's present on Maxwell GPUs, heavily based on the code for the existing layout. This code is required for GM20x support. While GM10x supports the older layout still, this commit switches it to use the updated version instead. Piglit testing shows zero regressions on GM107. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: import maxwell texture header definitions from rnndbBen Skeggs2016-02-161-0/+365
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50-: split tic format specificationBen Skeggs2016-02-165-58/+73
| | | | | | | | | | | We previously stored texture format information as it would appear in the TIC. We're about to support the new TIC layout that appeared with Maxwell, so it makes more sense to store the data in a split-out format. Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nv50-: remove nv50_texture.xml.hBen Skeggs2016-02-161-306/+0
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
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