| Commit message (Collapse) | Author | Age | Files | Lines |
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[airlied: final chunk of Mike's patch from bug 37476
this uses a loop to emit the GRADIENTS and does a check to
see if we need to fetch to a temporary register. It also
increases the context src gpr to 4 which is needed here.]
Signed-off-by: Dave Airlie <[email protected]>
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[airlied: taken from Mike's patch in bug 37476]
Signed-off-by: Dave Airlie <[email protected]>
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Mike had actually done a lot of the TXD support in a patch in bug
37476 which I see now, I'll add the bits of his work that I didn't think
to add to my work.
Signed-off-by: Dave Airlie <[email protected]>
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This at least passes the piglit arb_shader_texture_lod-texgrad test,
the AMD shader analyzer seems to multiply the V component by an unspecified
constant value no idea why.
Signed-off-by: Dave Airlie <[email protected]>
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This sets the base level as the zero level, which fixes
piglit/texturing/tex-miplevel-selection*.
The r600 hardware ignores the BASE_LEVEL field in some cases, so we can't
use it.
Evergreen might need this too.
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Copy-and-paste from the bgra cases. The C paths attempt to avoid
copying the 'x' channel, but it's harmless, you might as well. Good for
about 5% in glxgears (740 to 780 fps).
Signed-off-by: Adam Jackson <[email protected]>
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Used the vertprog instead of gmtyprog.
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fixes fdo bug 38145
Signed-off-by: Vadim Girlin <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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this needs a piglit run.
Signed-off-by: Dave Airlie <[email protected]>
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Snatched from xvmc.
Signed-off-by: Daniel Vetter <[email protected]>
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Put the shader programs into an immutable buffer object.
Also make sure that those object can be taken from the user
space buffer object pool.
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Fix an obvious typo in the yet unused part of the shader setup.
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No regressions found with :
- piglit (quick.tests)
- Unigine Heaven
- Lightsmark
- openarena
- Imprudence (Second Life fork)
agd5f Note: this patch was previously reverted due to piglit
regressions, but I'm not able to reproduce them here.
See this bug:
https://bugs.freedesktop.org/show_bug.cgi?id=34008
and discussion:
http://lists.freedesktop.org/archives/dri-devel/2011-June/011996.html
Signed-off-by: Alex Deucher <[email protected]>
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pipe_resource_reference call was miossing, thus creating massive memory under certain conditions.
Fix : https://bugs.freedesktop.org/show_bug.cgi?id=37168
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v2: Incorporated feedback from Jakob Bornecrantz.
Signed-off-by: Daniel Vetter <[email protected]>
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It's a special reg and does not require a flush like
the other CONFIG regs.
Signed-off-by: Alex Deucher <[email protected]>
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CONFIG regs (byte offsets 0x8000-0xac00) are single state and the pipeline
must be flushed and hw idle when they are changed. Border color regs
are in the CONFIG range and this is why a flush is required when changing
them. CONTEXT regs (byte offset 0x28000+) are multi-state and those do
not require flushes when changing them.
Signed-off-by: Alex Deucher <[email protected]>
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If the wrap R (3rd) mode is set to CLAMP or CLAMP_TO_BORDER and the texture
isn't 3D, r300 always samples the border color regardless of texture
coordinates.
I HATE THIS HARDWARE.
NOTE: This is a candidate for the 7.10 branch.
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Ideally we'd have a compiler and register spilling and all that
but this is good enough for now to avoid the gpu hang in piglit,
glsl-vs-vec4-indexing-temp-dst-in-nested-loop-combined
on r600/r700 cards.
based on r600c patch
Andre Maasikas <[email protected]>
r600c: bump sq gpr resources if a shader needs more than default
Signed-off-by: Dave Airlie <[email protected]>
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NOTE: This is a candidate for the 7.10 branch.
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Looks like only next_power_of_two, logbase2 and bitcount use builtins
requiring gcc 3.4, so maybe everything else compiles with older gcc.
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Use __builtin_clz when available for logbase/next_power_of_two,
and replace next_power_of_two with faster implementation otherwise.
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GLOBAL_GPR regs should be 0. Need to set the
number of temp regs in SQ_GPR_RESOURCE_MGMT_1.
Signed-off-by: Alex Deucher <[email protected]>
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Previously, we were errantly drawing some interior edges of clipped
polygons and quads. Also, we were introducing extra edges where
polygons intersected the view frustum clip planes.
The main problem was that we were ignoring the edgeflags encoded in
the primitive header's 'flags' field which are set during polygon/quad
->tri decomposition. We need to observe those during clipping. Since
we can't modify the existing vert's edgeflag fields, we need to store
them in a parallel array.
Edge flags also need to be handled differently for view frustum planes
vs. user-defined clip planes. In the former case we don't want to draw
new clip edges but in the later case we do. This matches NVIDIA's
behaviour and it just looks right.
Finally, note that the LLVM draw code does not properly set vertex
edge flags. It's OK on the regular software path though.
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need more sleep or something.
Signed-off-by: Dave Airlie <[email protected]>
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This makes sure these are enabled even if set to 0 at startup.
Signed-off-by: Dave Airlie <[email protected]>
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