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* vc4: Add support for loading/storing the depth buffer.Eric Anholt2014-09-092-7/+62
| | | | | | For now it still requires the color buffer to be present -- we're relying on the store of color buffer contents to end the frame, and we have to do something with color buffers in the rendering config packet.
* vc4: Don't forget to do initial tile clearing for depth/stencil.Eric Anholt2014-09-091-1/+6
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* vc4: Ignore non-address bits of the offset for load/store.Eric Anholt2014-09-091-1/+1
| | | | | These only get used for full buffer dumps, which we don't support yet anyway.
* vc4: Add a debug flag for flushing after every draw.Eric Anholt2014-09-093-0/+6
| | | | | It was useful on i965, but it's even more useful for debugging tiled renderers.
* vc4: Add missing null terminator to the debug options list.Eric Anholt2014-09-091-0/+1
| | | | | So far, apparently there's been some NULL laying at the address just after the options anyway, but the next commit changed that.
* ilo: remove unused ilo_cp functionsChia-I Wu2014-09-092-146/+0
| | | | | | | | | | | | | Remove ilo_cp_begin() ilo_cp_steal() ilo_cp_write() ilo_cp_write_multi() ilo_cp_write_bo() ilo_cp_end() ilo_cp_steal_ptr() ilo_cp_assert_no_implicit_flush()
* ilo: convert GPE GEN6 command functions to use ilo_builderChia-I Wu2014-09-094-764/+730
| | | | | | | Similar to the changes to GEN7 command functions, but to GEN6 this time. As every GPE function has been converted, remove ilo_cp_assert_no_implicit_flush() calls.
* ilo: convert GPE GEN7 command functions to use ilo_builderChia-I Wu2014-09-094-517/+479
| | | | | | | | | | Make these changes ilo_cp_begin() -> ilo_builder_batch_pointer() ilo_cp_write() -> direct memory set ilo_cp_write_bo() -> ilo_builder_batch_reloc() and use this chance to drop the "_emit_" infix.
* ilo: convert GPE state functions to use ilo_builderChia-I Wu2014-09-094-154/+129
| | | | | | | | | Make these changes ilo_cp_steal_ptr() and memcpy() -> ilo_builder_state_write() ilo_cp_steal_ptr() -> ilo_builder_state_pointer() and use this chance to drop the "_emit_" infix.
* ilo: convert GPE surface functions to use ilo_builderChia-I Wu2014-09-092-56/+36
| | | | | | | | | | Make these changes ilo_cp_steal_ptr() and memcpy() -> ilo_builder_surface_write() ilo_cp_steal() and ilo_cp_write() -> ilo_builder_surface_write() ilo_cp_write_bo() -> ilo_builder_surface_reloc() and use this chance to drop the "_emit_" infix.
* ilo: convert BLT to use ilo_builderChia-I Wu2014-09-091-119/+122
| | | | | | | | | | | Make these changes ilo_cp_begin() -> ilo_builder_batch_pointer() ilo_cp_write() -> direct memory set ilo_cp_write_bo() -> ilo_builder_batch_reloc() and make sure there is no implicit flush. Use this chance to drop the "_emit_" infix.
* ilo: use ilo_builder for kernels and STATE_BASE_ADDRESSChia-I Wu2014-09-099-201/+61
| | | | | | Remove instruction buffer management from ilo_3d and adapt ilo_shader_cache to upload kernels to ilo_builder. To be able to do that, we also let ilo_builder manage STATE_BASE_ADDRESS.
* ilo: make ilo_cp based on ilo_builderChia-I Wu2014-09-0916-979/+114
| | | | | This makes ilo_cp use the builder to manage batch buffers, and use ilo_builder_decode() to replace ilo_3d_pipeline_dump().
* ilo: add a builder for building BOs for submissionChia-I Wu2014-09-094-0/+1641
| | | | | | | | | | | Comparing to how we manage batch and instruction buffers, the new builder - does not flush - manages both types of buffers - manages STATE_BASE_ADDRESS - uploads kernels using unsynchronized mapping - has its own decoder for the buffers - provides more helpers
* ilo: make toy_compiler_disassemble() more usefulChia-I Wu2014-09-095-9/+11
| | | | | | Do not require a toy_compiler so that it can be used in other places, such as state dumping. Add a bool to control whether the raw instruction words are shown.
* nv50/ir: accomodate all file types, there are now more than 8Ilia Mirkin2014-09-081-2/+2
| | | | | | Reported by Coverity Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: uses was always null at that point in the codeIlia Mirkin2014-09-081-7/+1
| | | | | | Reported by Coverity Signed-off-by: Ilia Mirkin <[email protected]>
* nv50/ir: avoid array overrun when checking for supported modsIlia Mirkin2014-09-082-2/+2
| | | | | | | Reported by Coverity Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.2 10.3" <[email protected]>
* nouveau: buffer can never be nullIlia Mirkin2014-09-081-2/+0
| | | | | | Reported by Coverity Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: insn can never be nullIlia Mirkin2014-09-081-1/+1
| | | | | | Reported by Coverity. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: size is a uint16_t, remove unnecessary assertionIlia Mirkin2014-09-081-1/+0
| | | | | | Reported by Coverity. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: avoid null deref of screen when collecting statsIlia Mirkin2014-09-081-1/+1
| | | | | | Reported by Coverity Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: use 64-bit math when scaling the query resultsIlia Mirkin2014-09-081-4/+4
| | | | | | Reported by Coverity. Signed-off-by: Ilia Mirkin <[email protected]>
* gallivm: (trivial) don't try to use rcp when the division 1/x is integerRoland Scheidegger2014-09-091-1/+1
| | | | | | | | This would just crash. Noticed by accident while checking int divisions by zero with a quickly hacked piglit test. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: (trivial) fix min / max variable namesRoland Scheidegger2014-09-091-8/+8
| | | | | | | | Calling the variable min when it's really max and vice versa seems a bit confusing. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: Fix Altivec pack intrinsics for little-endianUlrich Weigand2014-09-061-5/+21
| | | | | | | | | | | | | | | | | | | | This patch fixes use of Altivec pack intrinsics on little-endian PowerPC systems. Since little-endian operation only affects the load and store instructions, the semantics of pack (and other) instructions that take two input vectors implicitly change: the pack instructions still fill a register placing values from the first operand into the "high" parts of the register, and values from the second operand into the "low" parts of the register, but since vector loads and stores perform an endian swap, the high parts end up at high memory addresses. To still achieve the desired effect, we have to swap the two inputs to the pack instruction on little-endian systems. This is done automatically by the back-end for instructions generated by LLVM, but needs to be done manually when emitting intrisincs (which still result in that instruction being emitted directly). Signed-off-by: Ulrich Weigand <[email protected]> Signed-off-by: Maarten Lankhorst <[email protected]>
* nvc0/ir: clarify recursion fix to finding first tex usesChristoph Bumiller2014-09-051-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a simple shader for reproducing the case mentioned: FRAG DCL IN[0], GENERIC[0], PERSPECTIVE DCL OUT[0], COLOR DCL SAMP[0] DCL CONST[0] DCL TEMP[0..1], LOCAL IMM[0] FLT32 { 0.0000, -1.0000, 1.0000, 0.0000} 0: MOV TEMP[0].x, CONST[0].wwww 1: MOV TEMP[1].x, CONST[0].wwww 2: BGNLOOP 3: IF TEMP[0].xxxx 4: BRK 5: ENDIF 6: ADD TEMP[0].x, TEMP[0], IMM[0].zzzz 7: IF CONST[0].xxxx 8: TEX TEMP[1].x, CONST[0], SAMP[0], 2D 9: ENDIF 10: IF CONST[0].zzzz 11: MOV TEMP[1].x, CONST[0].zzzz 12: ENDIF 13: ENDLOOP 14: MOV OUT[0], TEMP[1].xxxx 15: END Cc: "10.2 10.3" <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir/util: fix BitSet issuesChristoph Bumiller2014-09-053-3/+10
| | | | | | | | | | | | | BitSet::allocate() is being used with the expectation that it would leave the bitfield untouched if its size hasn't changed, however, the function always zeroed the last word, which led to obscure bugs with live set computation. This also fixes BitSet::resize(), which was broken, but luckily not being used. Cc: "10.2 10.3" <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: remove nvc0_push, replaced with nvc0_vbo_translateIlia Mirkin2014-09-052-410/+0
| | | | | | Fixes build. Signed-off-by: Ilia Mirkin <[email protected]>
* nv50,nvc0: get rid of draw module supportIlia Mirkin2014-09-057-224/+0
| | | | | | | This hasn't been enabled in a long time and is completely stale and unnecessary. Remove, esp since it doesn't build. Signed-off-by: Ilia Mirkin <[email protected]>
* gallium/vc4: ship all files in the tarballEmil Velikov2014-09-051-1/+13
| | | | | | | | | - include all headers in Makefile.sources Cc: Eric Anholt <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/trace: ship all files in the tarballEmil Velikov2014-09-052-1/+12
| | | | | | | | - include all headers in Makefile.sources - bundle the scons buildscript, README and trace.xsl Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/svga: ship all files in the tarballEmil Velikov2014-09-052-12/+62
| | | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the android & scons buildscript - include the headers' README & svga_dump.py Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/softpipe: ship all files in the tarballEmil Velikov2014-09-052-10/+32
| | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the android & scons buildscript Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/rbug: ship all files in the tarballEmil Velikov2014-09-052-2/+8
| | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the android buildscript & README Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/radeonsi: ship all files in the tarballEmil Velikov2014-09-052-0/+8
| | | | | | | | - include all headers in Makefile.sources - bundle the android buildscript Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/radeon: ship all files in the tarballEmil Velikov2014-09-052-7/+20
| | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the android buildscript & LLVM note Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/r600: ship all files in the tarballEmil Velikov2014-09-052-8/+36
| | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the android buildscript & custom include Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/r300: ship all files in the tarballEmil Velikov2014-09-052-25/+72
| | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the android buildscript & the tests Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/nouveau: ship all files in the tarballEmil Velikov2014-09-052-36/+113
| | | | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the android buildscript v2: Don't double-include the compiler sources. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/noop: ship all files in the tarballEmil Velikov2014-09-052-0/+3
| | | | | | | | - include all headers in Makefile.sources - bundle the scons buildscript Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/llvmpipe: ship all files in the tarballEmil Velikov2014-09-052-3/+35
| | | | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the scons buildscript v2: Don't double include the test sources. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/identity: ship all files in the tarballEmil Velikov2014-09-052-2/+8
| | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the scons buildscript Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/ilo: ship all files in the tarballEmil Velikov2014-09-052-1/+48
| | | | | | | | | | - include all headers in Makefile.sources - bundle the android buildscript Cc: Chia-I Wu <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Chia-I Wu <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/i915: ship all files in the tarballEmil Velikov2014-09-052-14/+32
| | | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the android buildscript & TODO Cc: Stephane Marchesin <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/galahad: ship all files in the tarballEmil Velikov2014-09-052-2/+8
| | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the scons buildscript Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/freedreno: ship all files in the tarballEmil Velikov2014-09-052-12/+65
| | | | | | | | | | | - include all headers in Makefile.sources - sort the list(s) - bundle the android build Cc: [email protected] Cc: Rob Clark <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/tools: pick up the tools for distributionEmil Velikov2014-09-051-1/+2
| | | | | Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* gallium/tests: ship all the tests in the release tarballEmil Velikov2014-09-051-0/+4
| | | | | Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
* st/vega: ship the final headersEmil Velikov2014-09-051-0/+4
| | | | | | | | | Commit 60d772cd9d1(st/vega: add headers and SConscript in the tarball) meant to pick all the headers to be included in the release tarball yet it missed a few. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Matt Turner <[email protected]>
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