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* u_vbuf_mgr: rename to u_vbufMarek Olšák2011-11-227-30/+30
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* u_vbuf_mgr: better way to find a free VB slot + check errors earlyMarek Olšák2011-11-221-41/+62
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* u_vbuf_mgr: remove a useless variableMarek Olšák2011-11-221-4/+4
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* u_vbuf_mgr: remove redundant memsetMarek Olšák2011-11-221-3/+1
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* u_vbuf_mgr: don't reference non-native vertex buffers as nativeMarek Olšák2011-11-221-1/+2
| | | | | also don't mark them as 'user', because they will be uploaded through the translate fallback anyway.
* u_vbuf_mgr: rename translate_vb_slot -> fallback_vb_slotMarek Olšák2011-11-221-15/+14
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* gallium: separate out floating-point CAPs into its own enumMarek Olšák2011-11-2221-124/+146
| | | | | | | | | | | | | | | The motivation behind this is to add some self-documentation in the code about how each CAP can be used. The idea is: - enum pipe_cap is only valid in get_param - enum pipe_capf is only valid in get_paramf Which CAPs are floating-point have been determined based on how everybody except svga implemented the functions. svga have been modified to match all the other drivers. Besides that, the floating-point CAPs are now prefixed with PIPE_CAPF_.
* gallium: remove PIPE_CAP_GLSL and enable GLSL unconditionallyMarek Olšák2011-11-2214-35/+0
| | | | | Only i965g does not enable GLSL, but that driver has been unmaintained and bitrotting for quite a while anyway.
* i915g: implement RGBX and BGRX render targetsVasily Khoruzhick2011-11-222-2/+7
| | | | | | | | | | They're not supported by hw directly, but it's easy to emulate them with a shader swizzling fixup. Signed-off-by: Vasily Khoruzhick <[email protected]> [danvet: The important thing is to write a 1 to the unused alpha channel, the ddx is relying on this for render accel.] Signed-off-by: Daniel Vetter <[email protected]>
* r600g: handle PIPE_SHADER_CAP_OUTPUT_READVadim Girlin2011-11-211-0/+2
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* gallium: add PIPE_SHADER_CAP_OUTPUT_READVadim Girlin2011-11-212-2/+2
| | | | | | | It's intended to indicate whether the driver/hardware supports reading of the values written into shader outputs. Signed-off-by: Vadim Girlin <[email protected]>
* r300g: set max_index to 0xffffff if there are no per-vertex attribsMarek Olšák2011-11-201-2/+11
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* u_vbuf_mgr: correctly compute max vertex count from hw buffersMarek Olšák2011-11-203-27/+42
| | | | | | | | And update r300g. This is different from util_draw_max_index in how it obtains vertex elements and that it doesn't have to call util_format_description due to additional precomputed data in vertex elements.
* u_vbuf_mgr: correctly obtain min/max_index for uploads and translateMarek Olšák2011-11-201-7/+146
| | | | | | This forks vbo_get_minmax_index. We need to know the index range when translating non-native vertices into native ones. There is no other way around it.
* r600g: use u_vbuf_mgr to set/get the index bufferMarek Olšák2011-11-202-14/+5
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* r300g: use u_vbuf_mgr to set/get the index bufferMarek Olšák2011-11-203-24/+12
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* u_vbuf_mgr: add set_index_buffer functionMarek Olšák2011-11-202-0/+18
| | | | It will use the index buffer soon.
* u_vbuf_mgr: add commentsMarek Olšák2011-11-201-5/+15
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* u_vbuf_mgr: don't upload user buffers which have been uploaded by translateMarek Olšák2011-11-201-19/+33
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* r600g: set MIN/MAX_VTX_INDX to 0 and ~0, respectivelyMarek Olšák2011-11-201-10/+4
| | | | | | | The CS checker doesn't check the regs and the state-tracker-provided values are not to be trusted. This also removes the hack for non-zero index bias.
* r300g: always set VF_MIN_VTX_INDX to 0Marek Olšák2011-11-201-11/+10
| | | | It's not really useful to have non-zero there.
* gallium/docs: remove obsolete documentationMarek Olšák2011-11-191-14/+0
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* r600g: don't change the order of writes in merge_inst_groupVadim Girlin2011-11-171-1/+14
| | | | | | | | | | | | | | Merge may produce incorrect order of operations for r600-eg: x: inst1 R0.x, ... ; //from current group ... t: inst0 R0.x, ... ; //from previous group, same destination Result of inst1 will be lost. So compare destinations and don't allow this. Signed-off-by: Vadim Girlin <[email protected]>
* nvc0: add support for GF119 (NVD9)Ben Skeggs2011-11-172-0/+2
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* util/draw: replace assertions with conditionals in util_draw_max_index()Brian Paul2011-11-152-13/+39
| | | | | | | | | | | | | | Don't assert/die if a VBO is too small. Return zero instead. For debug builds, emit a warning message since this is an unusual situation that might indicate that there's a bug in the app. Note that util_draw_max_index() now returns max_index+1 instead of max_index. This lets us return zero to indicate that one of the VBOs is too small to draw anything. Fixes a failure with the new piglit vbo-too-small test. Reviewed-by: José Fonseca <[email protected]>
* r600g: fix the representation of control-flow instructionsMarek Olšák2011-11-159-426/+536
| | | | | | | | | | | | | | | | | | | | | | | | | | We need something that looks like a compiler and not like some hacker put some functions together. /rant This is a band-aid for these two problems: - The R600 and EG control-flow instructions appear in switch statements next to each other, causing conflicts when adding new instructions. - The ALU control-flow instructions are bitshifted by 3 (from CF_INST 26:29 to CF_INST 23:29, as is defined by r600 ISA) even for EG, where CF_INST is 22:29. To fix this mess, the 'inst' field is bitshifted to the left either by 22, 23, or 26 (directly in the definitions), such that it can be just or'd when making bytecode without any shifting. All switch statements have been divided into two, one for R600 and the other for EG. Of course, there is a better way to do this, but that is left for future work. Tested on RV730 and REDWOOD with no regressions. v2: minor cleanup as per Alex's comment. Reviewed-by: Alex Deucher <[email protected]>
* gallium: add TGSI_SEMANTIC_VERTEXIDChristoph Bumiller2011-11-145-2/+9
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* r600g: mask write for fake VS export componentsVadim Girlin2011-11-141-4/+4
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* r600g: fix op3 & write in merge_inst_groupsVadim Girlin2011-11-141-1/+1
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* r600g: set max max tex/vtx instructions count to 16 for caymanAlex Deucher2011-11-141-3/+1
| | | | | | Cayman is 16 as well. Signed-off-by: Alex Deucher <[email protected]>
* r600g: set max tex/vtx instructions count to 16 for evergreenVadim Girlin2011-11-141-1/+1
| | | | | | | According to evergreen-isa doc 16 is max value for evergreen. More than 16 doesn't work for me. Signed-off-by: Vadim Girlin <[email protected]>
* llvmpipe: Silent warnings about undeclared llvmpipe_check_render_cond.José Fonseca2011-11-142-0/+2
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* util: Avoid signed/unsigned comparison in u_trim_pipe_prim().José Fonseca2011-11-141-1/+1
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* llvmpipe: Remove unused variables.José Fonseca2011-11-141-2/+0
| | | | Reviewed-by: Brian Paul <[email protected]>
* llvmpipe: Make more resilient to out-of-memory situations.José Fonseca2011-11-145-24/+68
| | | | | | Most of the code was alright, but we were missing a few paths. Reviewed-by: Brian Paul <[email protected]>
* draw: Handle failure to allocate aligned_constant_storage.José Fonseca2011-11-141-3/+9
| | | | | | | | Also, actually update const_storage_size, therefore avoiding to unnecessarily reallocate aligned_constant_storage every single time draw_vs_set_constants() is called. Reviewed-by: Brian Paul <[email protected]>
* gallivm: Remove duplicate statement.José Fonseca2011-11-141-2/+0
| | | | | | ary_ge_arx_arz is already set earlier. Reviewed-by: Brian Paul <[email protected]>
* gallivm: Include stddef.h before the LLVM C++ headers.José Fonseca2011-11-142-0/+4
| | | | | Necessary with build against LLVM 2.6, with recent gcc, as LLVM headers depend on ptrdiff_t but don't properly include stddef.h
* llvmpipe: fix unswizzle of packed float types.Dave Airlie2011-11-141-2/+2
| | | | | | | | | | I messed up adding the ubyte->float conversion. This fixes getteximage-formats https://bugs.freedesktop.org/show_bug.cgi?id=42837 Signed-off-by: Dave Airlie <[email protected]>
* r600g: properly handle cayman in is_alu_vec_unit_inst()Alex Deucher2011-11-131-7/+15
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r600g: fix cb offset for flushed_depth_textureVadim Girlin2011-11-131-1/+1
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g: fix stencil buffer ref counting on evergreenVadim Girlin2011-11-131-1/+4
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g: lazy load for AR registerVadim Girlin2011-11-133-46/+61
| | | | | | Emit MOVA* instruction only when AR is used. Signed-off-by: Vadim Girlin <[email protected]>
* r600g: include INTERP_[XY|ZW] in is_alu_vec_unit_instVadim Girlin2011-11-131-1/+3
| | | | | | This will disallow moving them to the trans slot in merge_inst_groups Signed-off-by: Vadim Girlin <[email protected]>
* svga: don't crash/assert if we fail to allocate a vertex bufferBrian Paul2011-11-111-9/+20
| | | | | | | v2: check if pipe_buffer_map() returns NULL, and return NULL from svga_vbuf_render_map_vertices(). Per Jose's suggestion. Reviewed-by: José Fonseca <[email protected]>
* draw: handle out of memory conditionsBrian Paul2011-11-111-3/+5
| | | | | If the vbuf backend fails to allocate a vertex buffer, don't crash or assert.
* util: check for null vertex buffer object in blit codeBrian Paul2011-11-111-6/+10
| | | | Don't crash if we fail to allocate a vertex buffer.
* r600g: don't set the query result to 0 after a call to get_query_resultMarek Olšák2011-11-111-2/+0
| | | | get_query_result doesn't reset the result. Only begin_query does.
* r600g: the type of OCCLUSION_PREDICATE result should be booleanMarek Olšák2011-11-113-11/+17
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* radeon: silence initializer warningsBrian Paul2011-11-102-11/+33
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