summaryrefslogtreecommitdiffstats
path: root/src/gallium
Commit message (Expand)AuthorAgeFilesLines
* radeonsi: Enable adaptive_sync by default for radeonNicholas Kazlauskas2018-12-281-0/+4
* etnaviv: Consolidate buffer references from framebuffersTomeu Vizoso2018-12-283-10/+9
* virgl/vtest: fix front buffer flush with protocol version 0.Dave Airlie2018-12-281-1/+1
* nv50,nvc0: add missing CAPs for unsupported featuresIlia Mirkin2018-12-262-0/+3
* nvc0: enable GL_NV_shader_atomic_float on pre-MaxwellIlia Mirkin2018-12-261-0/+2
* nv50/ir: add support for converting ATOMFADD to proper irIlia Mirkin2018-12-261-0/+4
* gallium: add PIPE_CAP_TGSI_ATOMFADD to indicate supportIlia Mirkin2018-12-263-0/+4
* tgsi: add ATOMFADD operationIlia Mirkin2018-12-266-2/+23
* gallium/ttn: Fix setup of outputs_written.Eric Anholt2018-12-261-1/+1
* st/nine: Increase the limit of cached ff shadersAxel Davy2018-12-231-2/+2
* st/nine: Add src reference to nine_context_range_uploadAxel Davy2018-12-233-1/+8
* st/nine: Bind src not dst in nine_context_box_uploadAxel Davy2018-12-234-6/+6
* st/nine: Fix volumetexture dtor on ctor failureAxel Davy2018-12-231-1/+2
* st/nine: Switch to presentation buffer if resize is detectedAxel Davy2018-12-231-1/+36
* st/nine: Use helper to release swapchain buffers laterAxel Davy2018-12-232-8/+42
* freedreno/a6xx: fix 3d texture layoutRob Clark2018-12-223-3/+15
* freedreno: update generated headersRob Clark2018-12-227-21/+28
* freedreno/a6xx: improve setup_slices() debug msgsRob Clark2018-12-221-6/+5
* freedreno/a6xx: simplify special case for 3d layoutRob Clark2018-12-221-9/+10
* freedreno: combine fd_resource_layer_offset()/fd_resource_offset()Rob Clark2018-12-221-13/+2
* gallivm: abort when trying to use non-existing intrinsicRoland Scheidegger2018-12-211-0/+10
* gallivm: don't use pavg.b intrinsic on llvm >= 6.0Roland Scheidegger2018-12-212-51/+95
* pipe-loader: meson: reference correct libraryEmil Velikov2018-12-131-1/+1
* vc4: Hook up perf_debug() output to GL_ARB_debug_output as well.Eric Anholt2018-12-202-0/+3
* vc4: Wire up core pipe_debug_callbackRhys Kidd2018-12-202-0/+14
* v3d: Hook up perf_debug() output to GL_ARB_debug output as well.Eric Anholt2018-12-202-0/+3
* v3d: Wire up core pipe_debug_callbackRhys Kidd2018-12-202-0/+14
* v3d: Drop shadow comparison state from shader variant key.Eric Anholt2018-12-201-2/+0
* v3d: Fix simulator mode on i915 render nodes.Eric Anholt2018-12-201-28/+73
* gallivm: use llvm jit code for decoding s3tcRoland Scheidegger2018-12-207-383/+2239
* v3d: Load and store aligned utiles all at once.Eric Anholt2018-12-191-8/+114
* vc4: Move the utile load/store functions to a header for reuse by v3d.Eric Anholt2018-12-192-202/+11
* v3d: Implement texture_subdata to reduce teximage upload copies.Eric Anholt2018-12-191-29/+85
* v3d: Remove dead prototypes for load/store utile functions.Eric Anholt2018-12-191-2/+0
* v3d: Don't try to create shadow tiled temporaries for 1D textures.Eric Anholt2018-12-191-1/+2
* v3d: Fix check for TFU job completion in the simulator.Eric Anholt2018-12-191-1/+1
* v3d: Put the dst bo first in the list of BOs for TFU calls.Eric Anholt2018-12-191-2/+2
* winsys/amdgpu: Pull in LLVM CFLAGSMichel Dänzer2018-12-192-1/+2
* virgl: move resource creation / import / destruction to common codeGurchetan Singh2018-12-194-114/+89
* virgl: move resource metadata into base resourceGurchetan Singh2018-12-194-91/+71
* virgl: modify how we handle GL_MAP_FLUSH_EXPLICIT_BITGurchetan Singh2018-12-194-69/+25
* virgl: make virgl_buffers use resource helpersGurchetan Singh2018-12-192-20/+11
* virgl: make transfer code with PIPE_BUFFER targetsGurchetan Singh2018-12-191-2/+4
* virgl: consolidate transfer codeGurchetan Singh2018-12-195-59/+73
* virgl: store layer_stride in metadataGurchetan Singh2018-12-192-6/+6
* virgl: move vrend_get_tex_image_offset to common codeGurchetan Singh2018-12-193-26/+28
* virgl: move virgl_resource_layout to common codeGurchetan Singh2018-12-193-42/+51
* virgl: move texture metadata to common codeGurchetan Singh2018-12-192-12/+18
* virgl: remove unnessecary codeGurchetan Singh2018-12-191-3/+0
* virgl: texture_transfer_pool --> transfer_poolGurchetan Singh2018-12-196-11/+11