| Commit message (Collapse) | Author | Age | Files | Lines |
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It's unused here, and undefined in scons. It is used in targets/osmesa,
but it's properly defined there already.
Reviewed-by: Eric Engestrom <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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1. The hgl.c file is a read-only file versus read-write.
Ref: src/gallium/state_trackers/hgl/hgl.c
2. I've included the Haiku-specific patches I used to get a successful
build of Mesa 19.1.7 on Haiku using the meson/ninja build procedure.
Shows "[764/764] linking target ... libswpipe.so" at build completion.
v2:
Remove autotools files (Eric)
v3:
Update the patch
Reported-by: Ken Mays <[email protected]>
Tested-by: Ken Mays <[email protected]>
CC: [email protected]
Reviewed-by: Alexander von Gluck IV <[email protected]>
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Reviewed-by: Kenneth Graunke <[email protected]>
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To enable EXT_demote_to_helper_invocation:
This extension adds a "demote" keyword that is similar to "discard" but
only suppresses subsequent writes and outputs to the framebuffer, and
does not terminate the execution of the invocation. For the remainder
of the execution, the invocation is "demoted" to act like a helper
invocation.
Reviewed-by: Kenneth Graunke <[email protected]>
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We can't just check for the BO base address, we need to check for the
full address including any offset we may have applied. When updating
the address, we need to include the offset again.
Fixes: 5ad0c88dbe3 ("iris: Replace buffer backing storage and rebind to update addresses.")
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Reviewed-by: Samuel Pitoiset <[email protected]>
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radeonsi doesn't use the format and internal shaders don't set it.
Reviewed-By: Timur Kristóf <[email protected]>
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v2: - update copyright year in all changed files
- rebase on master
Cc: 19.1 19.2 <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
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A while back, Michael Larabel noticed that Paraview's Wavelet Volume
case runs significantly slower on iris than i965. It turns out this
is because we enable CCS_E for 32-bit floating point formats, while
i965 disables it, with an oblique comment saying that we benchmarked
it (on what exactly?) and determined that it was a loss.
Paraview uses both R32_FLOAT and R32G32B32A32_FLOAT, and I observed
large framerate drops when enabling CCS_E for either format. However,
several other benchmarks (Aztec Ruins, many Synmark cases) use 16-bit
floating point formats, with no apparent ill effects.
So, disable compression for 32-bit float formats for now, but leave it
enabled for 16-bit float formats as they seem to be working fine.
Improves performance in Paraview's Wavelet Volume test by 62% on a
Skylake GT4e.
Fixes: 3cfc6a207bd ("iris: Fill out res->aux.possible_usages")
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Cc: 19.2 <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Cc: 19.2 <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Fixes: d92689c46f0d2da05ae6 ("etnaviv: nir: add native integers (HALTI2+)")
Signed-off-by: Eric Engestrom <[email protected]>
Reviewed-by: Jonathan Marek <[email protected]>
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Subtractions are already implemented as additions anyway.
Reviewed-by: Connor Abbott <[email protected]>
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Upcoming changes to sub optimization will make this pass required. Over
the course of that series, we see uniforms +.46%, instructions -.24%
(seems like a fine tradeoff -- uniforms are 1/2 the size of instructions
as far as cache occupancy)
Reviewed-by: Daniel Schürmann <[email protected]>
Reviewed-by: Connor Abbott <[email protected]>
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Reviewed-by: Jose Fonseca <[email protected]>
This patch is based on https://github.com/msys2/MINGW-packages/blob/28e3f85e09b6947ea80036c49f6c38f1394f93ca/mingw-w64-mesa/link-ole32.patch but with tweaks to avoid MSVC build break when applied.
v2: Create Mingw platform alias pointing to windows host platform define to avoid spurious crosscompilation;
v3: Fix obviously wrong compiler flags for swr driver;
v4: Update original patch URL because it has been relocated;
v5: Don't bother patching autools stuff as it's not used by MSYS2 Mingw-w64 build and it's days are numbered anyway;
v6: After Mingw posix flag fix in 295851eb things are far simpler as we don't need more linking of uuid, ole32, version and shell32 than what is already in place.
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Looks like blob uses following values for uniforms buffer:
0 for 8 bytes
1 for 16 bytes
2 for 24 bytes
2 for 32 bytes
3 for 40 bytes
3 for 48 bytes
3 for 56 bytes
3 for 64 bytes
4 for 72 bytes
It all looks like log2(size / 8) rounded up, so let's do the same.
Fixes: 931fc2a7b3f9("lima: do not set the PP uniforms address lowest bits")
Reviewed-by: Icenowy Zheng <[email protected]>
Signed-off-by: Vasily Khoruzhick <[email protected]>
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Fixes the following piglit test: fragdepth_gles2 (for ETNA_MESA_DEBUG=nir)
Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Fixes the following piglit test: fragdepth_gles2
Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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It just makes thing more complicated for no reason.
Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Allows some simplification.
Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Note it can still be improved a bit:
* Use alu swizzle to determine if src is scalar
* Take into account new immediates in the multiple uniform src lowering
Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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This can improve performance by allowing the LAST_VARYING_2X bit to be
set when possible (and possibility more benefits on HALTI5 where the
number of components is set for each varying).
Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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LOAD starts reading into the first enabled destination component, and
doesn't skip disabled components, so we need to allocate a destination with
contiguous components.
Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Only invert front facing when glFrontFace is GL_CW.
Fixes following deqp test:
dEQP-GLES2.functional.shaders.builtin_variable.frontfacing
Signed-off-by: Jonathan Marek <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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The PP uniforms address register in render state is not a direct pointer
to the uniforms storage -- instead, it points to an one-item array, and
the array item is the real pointer to the uniforms storage.
This register reuses some of its LSBs as a size field. Currently the
size is set according to the length of the real uniforms storage.
However, as the register itself contains only a pointer to the one-item
array, the size field should be set to the length of the one-item array
and subtract it by 1, which means a fixed value of 0. That means we can
just omit it now.
Test shows this should be the correct approach to set this register.
Signed-off-by: Icenowy Zheng <[email protected]>
Reviewed-by: Vasily Khoruzhick <[email protected]>
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Passes most of piglit's tests regarding arb_framebuffer_object
and unlocks some more piglit tests.
Signed-off-by: Christian Gmeiner <[email protected]>
Reviewed-by: Jonathan Marek <[email protected]>
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We are using util_resource_copy_region(..) as fallback which supports
different formats for src and dst. Improves the experience when running
deqp or piglit with a debug build.
Signed-off-by: Christian Gmeiner <[email protected]>
Reviewed-by: Jonathan Marek <[email protected]>
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Prior to xvmc 1.0.12 libxvmc incorrectly required libxv, but that was
fixed. This results in compilation failures for the gallium xvmc tracker
and tools. This patch fixes that by explicitly linking to libxv.
Fixes: 22a817af8a89eb3c762fc3e07b443a3ce37d7416
("meson: build gallium xvmc state tracker")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1844
Reviewed-by: Adam Jackson <[email protected]>
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This fixes cross compiling issues, because pkg-config is less likely to
get the wrong libs.
v2: - Fix typo in comment
Fixes: 22a817af8a89eb3c762fc3e07b443a3ce37d7416
("meson: build gallium xvmc state tracker")
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/939
Reviewed-by: Adam Jackson <[email protected]>
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There's no need to resolve everything.
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NIR may emit a single instrinsic to load several packed varyings,
but that's suboptimal for Utgard PP for several reasons:
- varyings that are used as sampler inputs can be passed using
pipeline register with increased precision
- we have small number of regs, so using a vec4 regs for storing
two vec2 varyings increases reg pressure.
Add NIR pass to split a single load into several loads and utilize
it in lima.
Reviewed-by: Qiang Yu <[email protected]>
Signed-off-by: Vasily Khoruzhick <[email protected]>
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This is based on the fix I used for the same problem on V3D. In this
case, it fixes all but the the
dEQP-GLES2.functional.texture.filtering.2d.*_npot cases of
dEQP-GLES2.functional.texture.filtering.2d.*'s failures.
Acked-by: Rob Clark <[email protected]>
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As Vasily discovered, the bit 7 of the word 1 of the texture descriptor
is set when reloading the framebuffer, to use framebuffer-based offset
rather than normalized one. This bit also works for regular textures to
enable accessing with non-normalized offset.
Add support for rectangle texture by setting this bit for
PIPE_TEXTURE_RECT.
Suggested-by: Vasily Khoruzhick <[email protected]>
Signed-off-by: Icenowy Zheng <[email protected]>
Reviewed-by: Vasily Khoruzhick <[email protected]>
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Add a function called ac_get_fs_input_vgpr_cnt which will return
the number of input VGPRs used by an AMD shader. Previously,
radv and radeonsi had the same code duplicated, but this commit also
allows them to share this code.
Signed-off-by: Timur Kristóf <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Consolidate a few more generic shaders setup regs in fd6_emit_shader.
Signed-off-by: Kristian H. Kristensen <[email protected]>
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Signed-off-by: Kristian H. Kristensen <[email protected]>
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Signed-off-by: Kristian H. Kristensen <[email protected]>
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This add generic stage state setup for HS/DS/GS to the program state
object.
Signed-off-by: Kristian H. Kristensen <[email protected]>
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Let's try to always order the stages in the pipeline order.
Signed-off-by: Kristian H. Kristensen <[email protected]>
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Signed-off-by: Kristian H. Kristensen <[email protected]>
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We're using vs and fs now, and adding hs, ds and gs soon. It's
confusing enough that we have both DS/TCS and HS/TES. At least for VS
and FS there doesn't have to be multiple names.
Signed-off-by: Kristian H. Kristensen <[email protected]>
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We'll be sharing this logic for new shader stages soon.
Signed-off-by: Kristian H. Kristensen <[email protected]>
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RET as a last instruction could be safely ignored.
Remove it to prevent crashes/warnings in case underlying driver
doesn't implement arbitrary returns.
A better way would be to remove the RET after the whole shader
is parsed which will handle a possible case when the last RET is
followed by a comment.
CC: <[email protected]>
Signed-off-by: Danylo Piliaiev <[email protected]>
Reviewed-by: Axel Davy <[email protected]>
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Signed-off-by: Andreas Baierl <[email protected]>
Reviewed-by: Connor Abbott <[email protected]>
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Signed-off-by: Karol Herbst <[email protected]>
Reviewed-by: Pierre Moreau <[email protected]>
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Signed-off-by: Karol Herbst <[email protected]>
Reviewed-by: Pierre Moreau <[email protected]>
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both clang and gcc warn with:
"moving a local object in a return statement prevents copy elision"
Signed-off-by: Karol Herbst <[email protected]>
Reviewed-by: Pierre Moreau <[email protected]>
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