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* r600/vce: enable VCE for trinity/richlandChristian König2015-10-131-1/+21
* r600/uvd: disable UVD tiling by defaultChristian König2015-10-131-3/+5
* r600g: Enable GL_ARB_gpu_shader5 extensionGlenn Kennard2015-10-131-1/+1
* r600g/sb: SB support for UBO indexingGlenn Kennard2015-10-1311-27/+140
* r600g/sb: Support gs5 sampler indexing (v2)Glenn Kennard2015-10-139-25/+195
* nouveau: avoid double-emitting fenceIlia Mirkin2015-10-121-1/+5
* u_vbuf: fix vb slot assignment for translated buffersNicolai Hähnle2015-10-121-0/+1
* ilo: improve Gen8 defines based on its PRMsChia-I Wu2015-10-1213-121/+399
* nv50,nvc0: don't base decisions on available pushbuf spaceIlia Mirkin2015-10-113-35/+10
* nouveau: avoid emitting new fences unnecessarilyIlia Mirkin2015-10-111-3/+9
* nvc0: make use of NVC0_COMPUTE_CLASS for GF110Samuel Pitoiset2015-10-101-5/+2
* tgsi: (trivial) kill c99-ism.Roland Scheidegger2015-10-091-2/+3
* tgsi/scan: add info about declared samplers (v2)Marek Olšák2015-10-092-0/+3
* tgsi: add a utility for emulating some GL featuresMarek Olšák2015-10-093-0/+208
* glsl: move shader_enums into nirRob Clark2015-10-094-3/+3
* nvc0: move HW SM queries to nvc0_query_hw_sm.c/h filesSamuel Pitoiset2015-10-098-796/+908
* nvc0: move HW queries to nvc0_query_hw.c/h filesSamuel Pitoiset2015-10-098-1215/+1310
* nvc0: move SW queries to nvc0_query_sw.c/h filesSamuel Pitoiset2015-10-095-84/+204
* nvc0: move nvc0_so_target_save_offset() to its correct locationSamuel Pitoiset2015-10-093-24/+19
* nvc0: add a header file for nvc0_querySamuel Pitoiset2015-10-097-189/+202
* gallium/ddebug: add missing dd_util.h to sources listEmil Velikov2015-10-081-1/+2
* gallium/ddebug: automake: sort sources alphabeticallyEmil Velikov2015-10-081-2/+2
* radeonsi: fix a GS hang on VIMarek Olšák2015-10-072-0/+19
* radeonsi: remove TC L2 cache flush for index buffers on VIMarek Olšák2015-10-071-3/+3
* svga: whitespace fixes in svga_sampler_view.cBrian Paul2015-10-071-8/+16
* svga: whitespace fixes in svga_resource_buffer.cBrian Paul2015-10-071-26/+27
* svga: round UBO constant buffer size up/down to multiple of 16 bytesBrian Paul2015-10-071-0/+18
* nouveau: make sure there's always room to emit a fenceIlia Mirkin2015-10-074-2/+8
* vc4: use nir two-sided-color loweringBoyan Ding2015-10-062-24/+2
* vc4: Fix a leak of the last color read/write surface on context destroy.Eric Anholt2015-10-061-0/+3
* vc4: Fix a memory leak in the simulator case.Eric Anholt2015-10-061-1/+6
* tgsi: add const qualifier to silence warningBrian Paul2015-10-061-1/+1
* nv30: always go through translate module on big-endianIlia Mirkin2015-10-041-0/+4
* nv30: pretend to have packed texture/surface formatsIlia Mirkin2015-10-041-12/+12
* st/dri: Use packed RGB formatsMichel Dänzer2015-10-042-17/+17
* radeonsi: enable PIPE_CAP_FORCE_PERSAMPLE_INTERPMarek Olšák2015-10-031-1/+1
* radeonsi: do force_persample_interp in shaders for non-trivial casesMarek Olšák2015-10-033-19/+117
* radeonsi: implement the simple case of force_persample_interpMarek Olšák2015-10-034-1/+37
* radeonsi: move SPI_PS_INPUT_ENA/ADDR registers to a separate stateMarek Olšák2015-10-034-14/+29
* tgsi/scan: add interpolation info into tgsi_shader_infoMarek Olšák2015-10-032-3/+101
* gallium: add per-sample interpolation control into rasterizer statOAeMarek Olšák2015-10-0316-0/+24
* st/dri: don't use _ctx in client_wait_syncMarek Olšák2015-10-031-2/+5
* r600g: only do depth-only or stencil-only in-place decompressionMarek Olšák2015-10-034-12/+43
* radeonsi: only do depth-only or stencil-only in-place decompressionMarek Olšák2015-10-033-10/+34
* gallium/radeon: add separate stencil level dirty flagsMarek Olšák2015-10-036-5/+12
* radeonsi: dump buffer lists while debuggingMarek Olšák2015-10-034-1/+131
* winsys/radeon: implement cs_get_buffer_listMarek Olšák2015-10-033-22/+47
* winsys/amdgpu: add winsys function cs_get_buffer_listMarek Olšák2015-10-033-0/+36
* gallium/radeon: stop using "reloc" in a few placesMarek Olšák2015-10-0312-82/+81
* gallium/radeon: tell the winsys the exact resource binding typesMarek Olšák2015-10-0324-131/+175
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