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* draw: don't crash on vertex buffer overflowZack Rusin2013-05-1416-42/+137
| | | | | | | | | | | | | | We would crash when stride was bigger than the size of the buffer. The correct behavior is to just fetch zero's in this case. Unfortunatly with user_buffer's there's no way to validate the size because currently we're just not getting it. Adjust the draw interface to pass the size along the mapped buffer, which works perfectly for buffer backed vertex_buffers and, in future, it will allow us to plumb user_buffer sizes through the same interface. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: José Fonseca <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm/soa: implement indirect addressing in immediatesZack Rusin2013-05-142-2/+82
| | | | | | | | | | | | | The support is analogous to the way we handle indirect addressing in temporaries, except that we don't have to worry about storing (after declarations) and thus we'll able to keep using the old code when indirect addressing isn't used. In other words we're still using constants directly, unless the instruction has immediate register with indirect addressing. Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: José Fonseca <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* draw/gs: don't bind the tgsi state if we're using llvm pathsZack Rusin2013-05-141-1/+6
| | | | | | Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: José Fonseca <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: Fix build with LLVM >= 3.4 r181680.Vinson Lee2013-05-141-1/+3
| | | | | Tested-by: Laurent Carlier <[email protected]> Signed-off-by: Vinson Lee <[email protected]>
* radeonsi: update r600_get_llvm_processor_name for hainanAlex Deucher2013-05-141-0/+1
| | | | | Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add support for hainan chipsAlex Deucher2013-05-144-0/+6
| | | | | | | Note: this is a candidate for the 9.1 branch Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* draw: Fix io_ptr/num_prims name in IR.José Fonseca2013-05-141-1/+1
| | | | Trivial.
* graw/tgsi_dump: Fix gdb macro.José Fonseca2013-05-141-2/+2
| | | | The macro was relying on "tokens" local variable to exist.
* r600g/sb: add missing cases for ARUBA chipsVadim Girlin2013-05-142-0/+2
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: get rid of standard c++ streamsVadim Girlin2013-05-1424-545/+592
| | | | | | | | | | | | Static initialization of internal libstdc++ data related to iostream causes segfaults with some apps. This patch replaces all uses of std::ostream and std::ostringstream in sb with custom lightweight classes. Prevents segfaults with ut2004demo and probably some other old apps. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: separate bytecode decoding and parsingVadim Girlin2013-05-146-144/+163
| | | | | | | | | Parsing and ir construction is required for optimization only, it's unnecessary if we only need to print shader dump. This should make new disassembler more tolerant to any new features in the bytecode. Signed-off-by: Vadim Girlin <[email protected]>
* vl/vdpau: fix PresentationQueueQuerySurfaceStatusChristian König2013-05-142-17/+19
| | | | | | | | The last queued surface always keeps displaying. Fixing a problem with XBMC. Signed-off-by: Christian König <[email protected]>
* ilo: rework ilo_textureChia-I Wu2013-05-145-766/+1027
| | | | | Use ilo_buffer for buffer resources and ilo_texture for texture resources. A major cleanup is necessitated by the separation.
* ilo: rename ilo_resource to ilo_textureChia-I Wu2013-05-147-322/+322
| | | | In preparation for the introduction of ilo_buffer.
* ilo: move transfer-related functions to a new fileChia-I Wu2013-05-146-450/+518
| | | | | | Resource mapping is distinct from resource allocation, and is going to get more and more complex. Move the related functions to a new file to make the separation clear.
* gallium: add PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE for GLMarek Olšák2013-05-1111-1/+19
| | | | | | v2: fix typo 65535 -> 65536 Reviewed-by: Brian Paul <[email protected]>
* ilo: Initialize read_back in transfer_map_sys.Vinson Lee2013-05-101-1/+1
| | | | | | | Fixes "Uninitialized scalar variable" defect reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* r600g: increase array size for shader inputs and outputsMarek Olšák2013-05-102-2/+4
| | | | | | | and add assertions to prevent buffer overflow. This fixes corruption of the r600_shader struct. NOTE: This is a candidate for the stable branches.
* targets/dri-i915: Force c++ linker in all casesChí-Thanh Christopher Nguyễn2013-05-091-8/+2
| | | | | | NOTE: This is a candidate for the 9.1 branch. Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=461696 Reviewed-by: Andreas Boll <[email protected]>
* ilo: Add support for HW primitive restart.Courtney Goeltzenleuchter2013-05-103-2/+194
| | | | | | | | | Now tells Gallium that ilo supports primitive restart. Updated ilo_draw_vbo to be able to check that the indexed primitive being rendered can actually be supported in HW. If not, will break up into individual prims similar to what Mesa does. [olv: a minor fix after rebasing and formatting]
* svga: misc whitespace and comment fixes in svga_cmd.cBrian Paul2013-05-091-82/+82
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* ilo: add support for PIPE_FORMAT_ETC1_RGB8Chia-I Wu2013-05-092-5/+61
| | | | It is decompressed to and stored as PIPE_FORMAT_R8G8B8X8_UNORM on-the-fly.
* ilo: support mapping with a staging system bufferChia-I Wu2013-05-091-0/+77
| | | | | It can be used for unpacking compressed texture on-the-fly or to support explicit transfer flushing.
* ilo: allow for different mapping methodsChia-I Wu2013-05-091-115/+187
| | | | | We want to or need to use a different mapping method when when the resource is busy, the bo format differs from the requested format, and etc.
* ilo: allow bo format to differ from that requestedChia-I Wu2013-05-092-14/+22
| | | | | For separate stencil buffer or formats not supported natively, the real format of the bo may differ from that requested.
* draw/llvm: Add additional llvm optimization passesStéphane Marchesin2013-05-081-0/+3
| | | | | | | | | | | | It helps a bit with vertex shader performance on i915g (a couple percent faster with openarena). I have tried most other passes, and they weren't showing any measurable improvement. Note that my vertex shaders didn't have loops, so maybe the loop optimizations could still be useful in the future. Reviewed-by: Brian Paul <[email protected]>
* i915: Use Y tiling for texturesStéphane Marchesin2013-05-081-2/+7
| | | | | | | | | | | This basically reverts commit 2acc7193743199701f8f6d1877a59ece0ec4fa5b. With the previous change, we're not batchbuffer limited any longer. So we actually start seeing a performance difference between X and Y tiling. X tiling is funny because it is faster for screen-aligned quads but slower in games. So let's use Y tiling which is 10% faster overall.
* i915g: Optimize batchbuffer sizesStéphane Marchesin2013-05-082-4/+6
| | | | | | | Now that we don't throttle at every batchbuffer, we can shrink the size of batchbuffers to achieve early flushing. This gives a significant speed boost in a lot of games (on the order of 20%).
* i915g: Add more PIPE_CAP_* supportStéphane Marchesin2013-05-081-0/+9
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* ilo: remove our own type inferenceChia-I Wu2013-05-081-97/+27
| | | | tgsi_opcode_infer_{src,dst}_type() works just fine.
* ilo: use tgsi_util_get_texture_coord_dim()Chia-I Wu2013-05-083-92/+4
| | | | And remove toy_tgsi_get_texture_coord_dim().
* tgsi: fix operand type of TGSI_OPCODE_NOTChia-I Wu2013-05-082-1/+2
| | | | | | | | | It should be TGSI_TYPE_UNSIGNED, not TGSI_TYPE_FLOAT. Fixed also gallivm not_emit_cpu() to use uint build context. Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Roland Scheidegger <[email protected]>
* tgsi: refactor tgsi_opcode_infer_src_type()Chia-I Wu2013-05-081-35/+9
| | | | | | | Call tgsi_opcode_infer_type() from tgsi_opcode_infer_src_type(). Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Roland Scheidegger <[email protected]>
* tgsi: refactor tgsi_opcode_infer_dst_type()Chia-I Wu2013-05-081-25/+35
| | | | | | | | | | | | | Move the body of tgsi_opcode_infer_dst_type() to a new helper function, tgsi_opcode_infer_type(), and call the helper function from tgsi_opcode_infer_dst_type(). The diff looks complicated simply because the code is moved around. A following commit will make tgsi_opcode_infer_src_type() call tgsi_opcode_infer_type(). Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Roland Scheidegger <[email protected]>
* tgsi: reorder opcodes in opcode type inferenceChia-I Wu2013-05-081-24/+24
| | | | | | | | | Reorder opcodes by their assigned numbers. This makes it easier to see the differences between tgsi_opcode_infer_src_type() and tgsi_opcode_infer_dst_type(). Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Roland Scheidegger <[email protected]>
* tgsi: clean up exec_tex()Chia-I Wu2013-05-081-168/+52
| | | | | | | | | | | | Make use of tgsi_util_get_texture_coord_dim() to replace the big switch table. There is a subtle difference with this change. When TXP is used with an array texture, the layer is now also projected. This behavior matches the TGSI doc. Since GLSL does not allow TXP on an array texture, I am not sure which behavior is correct or preferred. Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Roland Scheidegger <[email protected]>
* tgsi: add tgsi_util_get_texture_coord_dim()Chia-I Wu2013-05-082-0/+94
| | | | | | | | | | | | This util function returns the dimension of the texture coordinates for a texture target, and the location of the shadow reference value. For example, when the texture target is TGSI_TEXTURE_SHADOW2D, the dimension of the texture coordinates is 2, and the location of the ref value is 2 (that is, the Z channel). Signed-off-by: Chia-I Wu <[email protected]> Acked-by: Roland Scheidegger <[email protected]>
* nv50: initialize kick_notify callback in nv50_createBryan Cain2013-05-071-0/+1
| | | | | | Fixes infinite loop on startup in Portal and Left 4 Dead 2. NOTE: This is a candidate for the 9.0 and 9.1 branches.
* gallium: more tgsi documentation updatesRoland Scheidegger2013-05-071-131/+250
| | | | | | | | | Adds the remaining integer opcodes, and some opcodes are moved to more appropriate places, along with getting rid of the (already nearly empty) ps_2_x section. Though the CAP bits for some of these are still a bit in the air so the documentation isn't quite as watertight as is desirable. Reviewed-by: Jose Fonseca <[email protected]>
* ilo: Add missing break statement in aos_tex TGSI_OPCODE_TEX2 case.Vinson Lee2013-05-071-0/+1
| | | | | | | Fixes "Missing break in switch" defect reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* r600g/sb: optimize some cases for CNDxx instructionsVadim Girlin2013-05-072-5/+81
| | | | | | | | | | | | | | We can replace CNDxx with MOV (and possibly eliminate after propagation) in following cases: If src1 is equal to src2 in CNDxx instruction then the result doesn't depend on condition and we can replace the instruction with "MOV dst, src1". If src0 is const then we can evaluate the condition at compile time and also replace it with MOV. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix memory leaksVadim Girlin2013-05-072-1/+7
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix kcache handling on r6xxVadim Girlin2013-05-071-1/+5
| | | | | | | | | Use the same limit for kcache constants in alu group on r6xx as on other chips (two const pairs). Relaxing this will require additional checks to make sure that all 4 consts in the group come from 2 kcache sets (clause limit), probably without noticeable improvements of shader performance. Signed-off-by: Vadim Girlin <[email protected]>
* gallivm: Fix build for LLVM < 3.3Tom Stellard2013-05-061-0/+6
| | | | | The C API versions of the LLVM multithreaded functions were added in LLVM 3.3.
* r600g/llvm: Parse config values in register / value pairsTom Stellard2013-05-062-4/+31
| | | | Rather than relying on a predetermined order for the config values.
* r600g/llvm: Don't feed LLVM output through r600_bytecode_build()Tom Stellard2013-05-064-395/+21
| | | | | The LLVM backend emits raw ISA now, so we can just its output unmodified.
* r600g/llvm: Don't emit CALL_FS for vertex shadersTom Stellard2013-05-062-8/+10
| | | | The LLVM backend takes care of this now.
* radeon/llvm: Always build libradeonllvm as staticTom Stellard2013-05-063-17/+10
| | | | | | | | | This library is very small, so there is not much to gain from building it as a shared library. Also, when linking statically with LLVM, a shared libradeonllvm exports LLVM symbols and creates problems when used with other shared objects that also link statically to LLVM. Reviewed-by: [email protected]
* radeon/llvm: Use LLVM C API for compiling LLVM IR to ISA v2Tom Stellard2013-05-065-203/+173
| | | | | | | | | | | The LLVM C API is considered stable and should never change, so it is much more desirable to use than the LLVM C++ API, which is constantly in flux. v2: - Split target initialization and lookup into separate functions Reviewed-by: [email protected]
* gallivm: Move LLVMStartMultithreaded() static initializer into gallivmTom Stellard2013-05-062-14/+15
| | | | | | | This does not solve all of the problems with using LLVM in a multithreaded enivronment, but it should help in some cases. Reviewed-by: [email protected]
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