| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | radeon/llvm: Remove auto-generated AMDIL->ISA conversion code | Tom Stellard | 2012-05-24 | 14 | -280/+28 |
| * | radeon/llvm: Remove AMDIL instructions MULHI, SMUL | Tom Stellard | 2012-05-24 | 3 | -10/+5 |
| * | radeon/llvm: Remove AMDIL bitshift instructions (SHL, SHR, USHR) | Tom Stellard | 2012-05-24 | 8 | -693/+6 |
| * | radeon/llvm: Remove AMDIL FTOI and ITOF instructions | Tom Stellard | 2012-05-24 | 7 | -316/+7 |
| * | radeon/llvm: Remove AMDIL EXP* instructions | Tom Stellard | 2012-05-24 | 5 | -15/+7 |
| * | radeon/llvm: Remove AMDIL ADD instructions | Tom Stellard | 2012-05-24 | 6 | -179/+4 |
| * | radeon/llvm: Remove AMDIL binary instrutions (OR, AND, XOR, NOT) | Tom Stellard | 2012-05-24 | 8 | -422/+8 |
| * | radeon/llvm: Remove AMDILMachinePeephole pass | Tom Stellard | 2012-05-24 | 4 | -177/+0 |
| * | radeon/llvm: Remove AMDIL CMP instructions and associated lowering code | Tom Stellard | 2012-05-24 | 3 | -661/+22 |
| * | radeon/llvm: Remove AMDIL ROUND_NEAREST instruction | Tom Stellard | 2012-05-24 | 4 | -6/+6 |
| * | radeon/llvm: Remove AMDIL ROUND_POSINF instruction | Tom Stellard | 2012-05-24 | 4 | -6/+10 |
| * | radeon/llvm: Add custom SDNode for FRACT | Tom Stellard | 2012-05-24 | 6 | -6/+10 |
| * | radeon/llvm: Use -1 as true value for SET* integer instructions | Tom Stellard | 2012-05-24 | 3 | -32/+28 |
| * | radeon/llvm: Handle SETGE_INT, SETGE_UINT, and SETGT_UINT opcodes | Tom Stellard | 2012-05-24 | 1 | -0/+6 |
| * | radeon/llvm: Avoid error with SI in EmitInstrWithCustomInserter() | Tom Stellard | 2012-05-24 | 1 | -0/+1 |
| * | tgsi: Initialize Padding struct fields. | Vinson Lee | 2012-05-23 | 1 | -0/+4 |
| * | llvmpipe: Fix alpha testing precision on rgba8 formats. | José Fonseca | 2012-05-22 | 3 | -1/+34 |
| * | scons: Do not build glx and egl on Cygwin. | Vinson Lee | 2012-05-22 | 1 | -2/+2 |
| * | nv30: check for NULL vertex buffers in prevalidate_vbufs | Christoph Bumiller | 2012-05-22 | 1 | -1/+1 |
| * | nv50: make unaligned index buffer offsets work again | Christoph Bumiller | 2012-05-22 | 1 | -1/+3 |
| * | nvc0: don't set NEW_IDXBUF in nvc0_switch_pipe_context if none is bound | Christoph Bumiller | 2012-05-22 | 1 | -0/+2 |
| * | llvmpipe: Added a error counter to lp_test_conv. | James Benton | 2012-05-21 | 1 | -3/+7 |
| * | llvmpipe: Changed known failures in lp_test_conv. | James Benton | 2012-05-21 | 1 | -3/+9 |
| * | llvmpipe: Added fixed point types tests to lp_test_conv. | James Benton | 2012-05-21 | 1 | -6/+7 |
| * | gallivm: Fixed erroneous optimisation in lp_build_min/max. | James Benton | 2012-05-21 | 1 | -7/+14 |
| * | gallivm: Compensate for lp_const_offset in lp_build_conv. | James Benton | 2012-05-21 | 1 | -4/+31 |
| * | gallivm: Fixed overflow in lp_build_clamped_float_to_unsigned_norm. | James Benton | 2012-05-21 | 1 | -1/+1 |
| * | radeon/llvm: Handle selectcc DAG node | Tom Stellard | 2012-05-20 | 7 | -54/+350 |
| * | svga: whitespace, comments, formatting clean-ups | Brian Paul | 2012-05-19 | 1 | -38/+31 |
| * | svga: return PIPE_OK instead of 0 | Brian Paul | 2012-05-19 | 5 | -11/+11 |
| * | svga: fix zero-stride vertex array bug | Brian Paul | 2012-05-19 | 1 | -2/+6 |
| * | radeonsi: Only honour point related rasterizer state when rendering points. | Michel Dänzer | 2012-05-18 | 1 | -2/+3 |
| * | radeonsi: Fix parameter cache offsets for fragment shader inputs. | Michel Dänzer | 2012-05-18 | 3 | -2/+4 |
| * | gallium/tgsi/text: Ensure ret is initialized in parse_immediate_data. | Vinson Lee | 2012-05-17 | 1 | -0/+4 |
| * | radeon/llvm: Fix segfault while lowering lrp intrinsic | Tom Stellard | 2012-05-17 | 1 | -2/+3 |
| * | radeon/llvm: Add DAG nodes for MIN instructions | Tom Stellard | 2012-05-17 | 6 | -14/+38 |
| * | llvmpipe: Avoid adding floating point zero to flat inputs. | José Fonseca | 2012-05-18 | 1 | -1/+4 |
| * | Fix fetching integer inputs. | José Fonseca | 2012-05-18 | 1 | -0/+8 |
| * | llvmpipe: Implement TXQ. | Olivier Galibert | 2012-05-18 | 7 | -6/+227 |
| * | llvmpipe: Don't mess with the provoking vertex when inverting a triangle. | Olivier Galibert | 2012-05-18 | 1 | -5/+40 |
| * | radeon/llvm: Lower lrp intrinsic during ISel | Tom Stellard | 2012-05-17 | 3 | -7/+19 |
| * | radeon/llvm: Remove AMDIL MAD instruction defs | Tom Stellard | 2012-05-17 | 6 | -7/+14 |
| * | radeon/llvm: Remove AMDIL MUL_IEEE* instructions | Tom Stellard | 2012-05-17 | 3 | -7/+3 |
| * | r600g: Handle MUL_IEEE in r600_bytecode_get_num_operands | Tom Stellard | 2012-05-17 | 1 | -0/+2 |
| * | radeon/llvm: Expand fsub during ISel | Tom Stellard | 2012-05-17 | 2 | -11/+2 |
| * | radeon/llvm: Remove AMDIL floating-point ADD instruction defs | Tom Stellard | 2012-05-17 | 5 | -8/+9 |
| * | radeon/llvm: Remove AMDIL CMOVLOG* instruction defs | Tom Stellard | 2012-05-17 | 4 | -26/+6 |
| * | radeon/llvm: Move lowering of ABS_i32 to ISel | Tom Stellard | 2012-05-17 | 4 | -17/+16 |
| * | radeon/llvm: Remove sub patterns from AMDILInstrPatterns.td | Tom Stellard | 2012-05-17 | 2 | -21/+1 |
| * | radeon/llvm: Add custom SDNodes for MAX | Tom Stellard | 2012-05-17 | 10 | -10/+108 |
