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* radeonsi: fix the DCC MSAA bug workaroundMarek Olšák2020-02-111-1/+1
* svga: Use pipe_shader_state_from_tgsi to set shader stateNeha Bhende2020-02-111-1/+1
* svga: fix size of format_conversion_table[]Neha Bhende2020-02-111-0/+2
* radeonsi: don't report that multi-plane formats are supportedMarek Olšák2020-02-101-7/+0
* svga: Fix banded DMA uploadThomas Hellstrom2020-02-071-10/+11
* swr: Fix GCC 4.9 checks.Vinson Lee2020-02-072-2/+2
* gallium: let the pipe drivers decide the supported modifiersJames Xiong2020-02-071-6/+2
* gallium/swr: Fix gcc 4.8.5 compile errorKrzysztof Raszkowski2020-02-051-6/+5
* freedreno: allow ctx->batch to be NULLRob Clark2020-02-054-30/+2
* etnaviv: Destroy rsc->pending_ctx set in etna_resource_destroy()Marek Vasut2020-02-041-0/+1
* clover: Use explicit conversion from llvm::StringRef to std::stringJan Vesely2020-02-042-2/+3
* panfrost: Fix the damage box clamping logicBoris Brezillon2020-02-031-0/+2
* lima: Fix build with GCC 10.Vinson Lee2020-02-031-1/+1
* iris: Plumb deref block size through to 3DSTATE_SFJason Ekstrand2020-01-312-6/+10
* intel/common: Return the block size from get_urb_configJason Ekstrand2020-01-311-1/+1
* iris: Consolodate URB emitJason Ekstrand2020-01-313-36/+15
* intel/blorp: Always emit URB config on Gen7+Jason Ekstrand2020-01-311-17/+3
* intel: Take a gen_l3_config in gen_get_urb_configJason Ekstrand2020-01-311-4/+1
* iris: Use the URB size from the L3$ configJason Ekstrand2020-01-313-5/+2
* iris: Store the L3$ configs in the screenJason Ekstrand2020-01-313-14/+21
* iris: Set SLMEnable based on the L3$ configJason Ekstrand2020-01-311-4/+4
* intel/genxml: Drop SLMEnable from L3CNTLREG on Gen11Jason Ekstrand2020-01-311-1/+1
* anv,iris: Set 3DSTATE_SF::DerefBlockSize to per-poly on Gen12+Jason Ekstrand2020-01-311-0/+4
* lima: add noheap debug optionQiang Yu2020-01-302-0/+6
* lima: create heap buffer with new interface if availableQiang Yu2020-01-306-4/+33
* lima: fix lima_set_vertex_buffers()Icenowy Zheng2020-01-301-1/+1
* etnaviv: drop default state for PE_STENCIL_CONFIG_EXT2Christian Gmeiner2020-01-291-1/+0
* freedreno: remove flush-queueRob Clark2020-01-2914-97/+24
* freedreno: add gmem_lockRob Clark2020-01-293-0/+18
* freedreno: add gmem state cacheRob Clark2020-01-295-102/+256
* freedreno: get GMEM state from batchRob Clark2020-01-297-59/+59
* freedreno/a2xx: constify gmem stateRob Clark2020-01-291-4/+4
* freedreno/a3xx: constify gmem stateRob Clark2020-01-291-9/+9
* freedreno/a4xx: constify gmem stateRob Clark2020-01-291-10/+10
* freedreno/a5xx: constify gmem stateRob Clark2020-01-291-10/+10
* freedreno/a6xx: constify gmem stateRob Clark2020-01-291-13/+13
* freedreno: constify fd_vsc_pipeRob Clark2020-01-295-9/+9
* freedreno: constify fd_tileRob Clark2020-01-298-29/+29
* freedreno: consolidate GMEM stateRob Clark2020-01-298-19/+24
* freedreno: extract vsc pipe bo from GMEM stateRob Clark2020-01-297-35/+32
* iris: Support multiple chained batches.Kenneth Graunke2020-01-292-21/+25
* iris: Make iris_emit_default_l3_config pull devinfo from the batchKenneth Graunke2020-01-291-5/+4
* iris: Drop 'engine' from iris_batch.Kenneth Graunke2020-01-293-13/+2
* winsys/amdgpu: Close KMS handles for other DRM file descriptionsMichel Dänzer2020-01-292-3/+21
* winsys/amdgpu: Re-use amdgpu_screen_winsys when possibleMichel Dänzer2020-01-292-24/+48
* etnaviv: implement UBOsJonathan Marek2020-01-299-75/+109
* freedreno/a6xx: convert blend state to stateobjRob Clark2020-01-295-53/+54
* freedreno/a6xx: remove special handling based on MRT formatRob Clark2020-01-291-15/+1
* freedreno: use PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLENDRob Clark2020-01-2916-111/+27
* gallium/util: Increase the debug_flush map depthThomas Hellstrom2020-01-291-1/+1
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