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* gallium/util: add util_texrange_covers_whole_level from radeonMarek Olšák2016-06-012-17/+18
* radeonsi: fix the raster config setup for 1 RB iceland chipsAlex Deucher2016-06-011-1/+4
* nv50/ir: fix error finding free element in bitset in some situationsIlia Mirkin2016-05-311-0/+6
* nv50/ir: print relevant file's bitset when showing RA infoIlia Mirkin2016-05-311-4/+4
* radeonsi: Decompress DCC textures in a render feedback loop.Bas Nieuwenhuizen2016-05-314-0/+113
* radeonsi: Add counter to check if a texture is bound to a framebuffer.Bas Nieuwenhuizen2016-05-314-0/+26
* vc4: Fix compiler warnings in fail_instr path of QIR validate passRhys Kidd2016-05-311-10/+10
* svga: change enum pipe_resource_usage back to unsignedBrian Paul2016-05-311-1/+1
* radeonsi: fix CP DMA hazard with index buffer fetchesMarek Olšák2016-05-311-2/+20
* r600g: do GL-compliant integer resolvesMarek Olšák2016-05-311-37/+1
* radeonsi: do GL-compliant integer resolvesMarek Olšák2016-05-311-37/+1
* gallium/u_blitter: do GL-compliant integer resolvesMarek Olšák2016-05-311-19/+7
* radeonsi: don't flush TC at the end of IBs on DRM >= 3.2.0Marek Olšák2016-05-311-2/+3
* gallium/radeon: fixed division by zeroJakob Sinclair2016-05-311-0/+3
* nvc0/ir: fix spilling predicates to registersIlia Mirkin2016-05-301-0/+4
* nvc0/ir: limit max number of regs based on availability in SMIlia Mirkin2016-05-302-2/+4
* nv50/ir: record number of threads in a compute shaderIlia Mirkin2016-05-305-2/+10
* nv50/ir: Add missing handling of U64/S64 in inlinesPierre Moreau2016-05-301-1/+3
* vc4: Fix doxygen warnings12.0-branchpointRhys Kidd2016-05-302-6/+6
* mesa_glinterop: remove mesa_glinterop typedefsEmil Velikov2016-05-301-3/+3
* gallivm: initialize init_native_targets_once_flag correctlyFrederic Devernay2016-05-301-1/+1
* nvc0/ir: fix emission of predicate spill to registerIlia Mirkin2016-05-301-1/+2
* nvc0: fix some compute texture validation bits on keplerIlia Mirkin2016-05-303-2/+7
* swr: automake: silence the python invocationEmil Velikov2016-05-301-7/+8
* swr: automake: attempt to fix the out-of-tree buildEmil Velikov2016-05-301-0/+7
* swr: remove LLVM dependency from source generation rules.Emil Velikov2016-05-301-2/+2
* swr: add all the generators to the release tarball.Emil Velikov2016-05-301-0/+24
* softpipe: add sp_buffer.h to the sources list (release tarball)Emil Velikov2016-05-301-0/+1
* freedreno: make sure we pick up ir3_nir_trig.py in the release tarballEmil Velikov2016-05-301-0/+1
* gallium: push offset down to driverStanimir Varbanov2016-05-309-5/+53
* st/dri: cleanup image_from_fd/dma_buf pathsStanimir Varbanov2016-05-301-37/+44
* st/dri: add handling of R8 and GR88 DRI fourcc formatsStanimir Varbanov2016-05-301-0/+20
* radeonsi: Don't offset OFFCHIP_BUFFERING on pre-VI cards.Bas Nieuwenhuizen2016-05-301-2/+6
* nv50,nvc0: fix the max_vertices=0 caseIlia Mirkin2016-05-293-2/+4
* swr: [rasterizer] Do not define _mm256_storeu2_m128i with icc.Vinson Lee2016-05-281-1/+1
* gk110/ir: fix unspilling of predicates from registersIlia Mirkin2016-05-281-0/+28
* nvc0: remove outdated surfaces validation code for GK104Samuel Pitoiset2016-05-281-70/+0
* nvc0: do not always invalidate 3D CBs when using computeSamuel Pitoiset2016-05-281-8/+17
* gallium/util: another s/unsigned/enum pipe_prim_type/ for clangBrian Paul2016-05-271-1/+1
* gallium/util: another unsigned -> enum pipe_prim_type changeBrian Paul2016-05-271-1/+1
* radeonsi: enable OpenGL 4.3Bas Nieuwenhuizen2016-05-271-0/+4
* nouveau: enable GL 4.3 on kepler/fermiDave Airlie2016-05-281-1/+1
* radeonsi: always reserve output space for tess factorsMarek Olšák2016-05-271-1/+6
* gallium/ddebug: Add passthrough for query_memory_info.Bas Nieuwenhuizen2016-05-271-0/+9
* gallivm: eliminate a unnecessary AND with unorm lerpsRoland Scheidegger2016-05-271-10/+35
* gallium/util: use enum pipe_prim_type instead of unsigned some moreRoland Scheidegger2016-05-271-5/+16
* svga: remove unneeded casts in get_query_result_vgpu9() callsBrian Paul2016-05-271-2/+2
* svga: use MAYBE_UNUSED to silence release-build warningsBrian Paul2016-05-271-7/+4
* nvc0/ir: handle a load's reg result not being used for locked variantsIlia Mirkin2016-05-263-11/+45
* nvc0/ir: avoid generating illegal instructions for compute constbuf loadsIlia Mirkin2016-05-261-1/+2
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