| Commit message (Collapse) | Author | Age | Files | Lines |
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This table covered a large range unnecessarily, reduce the address
range covered, use the fact that the bottom two bits aren't significant,
and remove unused fields from the range struct. It also drops the hash_size/shift in context in favour of a define, which should make doing the math
a bit less CPU intensive.
valgrind glxinfo
Before:
==320== in use at exit: 419,754 bytes in 706 blocks
==320== total heap usage: 3,691 allocs, 2,985 frees, 7,272,467 bytes allocated
After:
==967== in use at exit: 419,754 bytes in 706 blocks
==967== total heap usage: 3,552 allocs, 2,846 frees, 3,550,131 bytes allocated
Signed-off-by: Dave Airlie <[email protected]>
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Currently r600g always maps every bo, this is quite pointless as it wastes
VM and on 32-bit with wine running VM space is quite useful.
So with this patch we don't create the mappings until first use, without
tiling enabled this probably won't make a major difference on its own,
but with tiled staged uploads it should avoid keeping maps for most of the
textures unnecessarily.
v2: add bo data ptr check
Signed-off-by: Dave Airlie <[email protected]>
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They need the same hack as rv670.
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=35312
Signed-off-by: Alex Deucher <[email protected]>
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The assertion is wrong, now that state tracker can cope with a window with
zero width or height.
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Introduced by 531b12af35a832bcd8928a4919d76f8e9405cde0.
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If state tracker asked us to map resource directly and we can't
do it (because of tiling), return NULL instead of doing full transfer
- state tracker should handle it and fallback to some other method
or repeat transfer without PIPE_TRANSFER_MAP_DIRECTLY.
It greatly improves performance of xorg state tracker on nv50+,
because its fallback (DFS/UTS) is much faster than full transfer.
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Signed-off-by: Jerome Glisse <[email protected]>
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PIPE_ARCH_UNKNOWN_ENDIAN is used no where else. All #else branches of
ifdef PIPE_ARCH_LITTLE assume big-endian. Not #error'ing out here
only serves to allow bad things to happen.
Signed-off-by: Matt Turner <[email protected]>
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Suggested by Julien Cristau.
Signed-off-by: Matt Turner <[email protected]>
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Localizes preprocessor usage to one place.
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Signed-off-by: Nicolas Kaiser <[email protected]>
Signed-off-by: Brian Paul <[email protected]>
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The r600/r700 support will follow soon.
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Reviewed-by: Brian Paul <[email protected]>
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Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=36914
Signed-off-by: Alex Deucher <[email protected]>
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We need to distinguish surfaces for mouse cursors from scanouts,
because nv50 hardware display engine ignores tiling flags.
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Signed-off-by: Kostas Georgiou <[email protected]>
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Spotted by Henri Verbeet
Signed-off-by: Alex Deucher <[email protected]>
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Setting SOURCE_FORMAT to EXPORT_NORM is an optimization.
Leaving SOURCE_FORMAT at 0 will work in all cases, but is less
efficient. The conditions for the setting the EXPORT_NORM
optimization are as follows:
R600/RV6xx:
BLEND_CLAMP is enabled
BLEND_FLOAT32 is disabled
11-bit or smaller UNORM/SNORM/SRGB
R7xx/evergreen:
11-bit or smaller UNORM/SNORM/SRGB
16-bit or smaller FLOAT
Signed-off-by: Alex Deucher <[email protected]>
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Don't emit sync packets for additional CBs or DB.
Spotted by Fredrik Höglund.
Signed-off-by: Alex Deucher <[email protected]>
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Hopefully we can find out the proper fix for this, but for now
this makes the fbo mipmap tests pass on my rv670 (x2 card).
Signed-off-by: Dave Airlie <[email protected]>
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r6xx asics have some problems with the surface
sync logic for the CB and DB. It's recommended
to use the event write interface for flushing
the DB/CB caches rather than the sync packets.
A single event write flush flushes all dst
caches, so we only need one for all CBs and DB.
Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=35312
Signed-off-by: Alex Deucher <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This fixes piglit fbo-alphatest-formats on Evergreen.
Signed-off-by: Henri Verbeet <[email protected]>
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This seems more in line with what the documentation suggests we should be
doing. It doesn't fix the rv635 regression, though I thought it might,
so it means I've no idea whats actually going wrong there.
Signed-off-by: Dave Airlie <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
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We use a hidden window for pbuffer contexts, but Windows limits window
sizes to the desktop size by default. This means that creating a big
pbuffer on a small resolution single monitor would truncate the pbuffer
size to the desktop.
This change overrides the windows maximum size, allow to create windows
arbitrarily large.
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While ensuring the framebuffer area is never zero.
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Signed-off-by: Alex Deucher <[email protected]>
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We need cursor data to land in destination buffer before drmModeSetCursor.
It fixes "cursor lag" on nv50.
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Pointed out by clang:
src/gallium/auxiliary/draw/draw_context.h:251:41: warning: implicit conversion
from enumeration type 'enum pipe_cap' to different enumeration type
'enum pipe_shader_cap' [-Wconversion]
return tgsi_exec_get_shader_param(param);
~~~~~~~~~~~~~~~~~~~~~~~~~~ ^~~~~
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We'll handle them like f64 vertex buffers, by falling back to
copying vertex data to the command buffer through translate.
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sizeof(struct pipe_rasterizer_state):
Before: 32 bytes
After: 28 bytes
Reviewed-by: Brian Paul <[email protected]>
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All texture LOD tests pass.
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This reverts commit 1dc204d145dc8c0b19473a7814c201a8954b6274.
MC_COORD_TRUNCATE is for MPEG and produces quite an interesting behavior
on regular textures. Anyway that commit broke filtering in demos/cubemap.
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