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* radeonsi: add support for PIPE_CAP_TGSI_TEXCOORDMarek Olšák2015-05-264-15/+13
* tgsi/ureg: enable creating tessellation shaders with ureg_create_shaderMarek Olšák2015-05-261-4/+14
* tgsi/text: enable parsing tessellation shadersMarek Olšák2015-05-261-0/+4
* gallium: rename TGSI tessellation processor types to match pipe shader namesMarek Olšák2015-05-265-17/+17
* gallium: use const in set_tess_stateMarek Olšák2015-05-262-4/+4
* clover: Build fix for FreeBSD.Koop Mast2015-05-261-0/+1
* nv30: falling back to draw path for edgeflag does no goodIlia Mirkin2015-05-251-3/+2
* nv30/draw: switch varying hookup logic to know about texcoordsIlia Mirkin2015-05-251-9/+16
* nv30/draw: allocate vertex buffers in gartIlia Mirkin2015-05-251-6/+10
* nv30/draw: only use the DMA1 object (GART) if the bo is not in VRAMIlia Mirkin2015-05-251-3/+3
* nv30/draw: fix indexed draws with swtnl path and a resource index bufferIlia Mirkin2015-05-251-3/+3
* llvmpipe: (trivial) add parantheses in (!x == y) expressionRoland Scheidegger2015-05-251-1/+1
* nv30/draw: draw expects constbuf size in bytes, not vec4 unitsIlia Mirkin2015-05-251-1/+1
* nv30/draw: avoid leaving stale pointers in draw stateIlia Mirkin2015-05-251-4/+4
* nv30: fix clip plane uploads and enable changesIlia Mirkin2015-05-241-9/+7
* nv30: avoid doing extra work on clear and hitting unexpected statesIlia Mirkin2015-05-245-9/+11
* nv30: avoid leaking render state and draw shadersIlia Mirkin2015-05-243-0/+16
* nv30: don't leak fragprog constsIlia Mirkin2015-05-241-0/+1
* nv50/ir: avoid messing up arg1 of PFETCHIlia Mirkin2015-05-231-2/+18
* clover: try userptr for CL_MEM_USE_HOST_PTRGrigori Goronzy2015-05-242-4/+15
* clover: implement CL_MEM_ALLOC_HOST_PTRGrigori Goronzy2015-05-241-0/+4
* nv30: check nouveau_bo_map output of notify boIlia Mirkin2015-05-231-1/+1
* nvc0: a geometry shader can have up to 1024 vertices outputIlia Mirkin2015-05-231-1/+1
* nv50: fix PIPE_QUERY_TIMESTAMP_DISJOINT, based on nvc0Samuel Pitoiset2015-05-231-17/+22
* nvc0/ir: LOAD's can't be used for shader inputsIlia Mirkin2015-05-222-0/+2
* nv50/ir: guess that the constant offset is the starting slot of arrayIlia Mirkin2015-05-221-2/+4
* nvc0/ir: set ftz when sources are floats, not just destinationsIlia Mirkin2015-05-221-3/+2
* nv50/ir: allow OP_SET to merge with OP_SET_AND/etc as well as a negIlia Mirkin2015-05-221-26/+55
* nvc0/ir: optimize set & 1.0 to produce boolean-float setsIlia Mirkin2015-05-222-0/+29
* nvc0/ir: allow iset to produce a boolean floatIlia Mirkin2015-05-223-5/+16
* nvc0/ir: avoid jumping to a sched instructionIlia Mirkin2015-05-223-2/+9
* nv50: fix PIPELINE_STATISTICS with HUD, based on nvc0Samuel Pitoiset2015-05-221-1/+2
* nv50: fix 64-bit queries with HUD, based on nvc0Samuel Pitoiset2015-05-221-1/+13
* radeon/vce: adapt new firmware interface changesChristian König2015-05-224-2/+252
* radeon/vce: move CPB handling function into common codeChristian König2015-05-223-29/+48
* u_math: uses assert, include assert.hDave Airlie2015-05-221-0/+1
* freedreno/a3xx: set .zw of sprite coords to .01Ilia Mirkin2015-05-201-3/+6
* freedreno/ir3: fix immediate usage in tgsi tex feIlia Mirkin2015-05-201-5/+9
* targets/osmesa: drop the -module tag from LDFLAGSEmil Velikov2015-05-201-1/+0
* nir: Get rid of the array elements parameter on load/store intrinsicsJason Ekstrand2015-05-203-13/+0
* gallium: remove TGSI_SAT_MINUS_PLUS_ONEMarek Olšák2015-05-2020-188/+47
* cso: add context cleanup code from st/mesaMarek Olšák2015-05-201-0/+7
* softpipe: start adding gather support (v2)Dave Airlie2015-05-203-83/+210
* softpipe: use arrays to make gather easierDave Airlie2015-05-201-36/+36
* tgsi: handle TG4 opcode in tgsi execDave Airlie2015-05-202-2/+12
* softpipe: add textureOffset support.Dave Airlie2015-05-202-62/+97
* softpipe: move control into a filter args structDave Airlie2015-05-202-26/+32
* softpipe: move some image filter parameters into a structDave Airlie2015-05-202-258/+224
* freedreno: fence fixRob Clark2015-05-181-1/+3
* gk110/ir: switch to gk104-style sched codes rather than all-in-oneIlia Mirkin2015-05-181-9/+9
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