| Commit message (Collapse) | Author | Age | Files | Lines |
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NOTE: This is a candidate for the 9.1 branch.
Tested-by: Vincent Lejeune <[email protected]>
Signed-off-by: Maarten Lankhorst <[email protected]>
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Taken from downstream:
http://anonscm.debian.org/gitweb/?p=pkg-xorg/lib/mesa.git;a=blob;f=debian/patches/15-fix-oot-build.diff;h=7040999a22d3937d0578cfd85ee2c71d7dc614bb;hb=refs/heads/ubuntu%2B1
NOTE: This is a candidate for the 9.1 branch.
Acked-by: Kenneth Graunke <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
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If we're in some conditional or loop we must not return, or the code
after the condition is never executed.
(v2): And, we also can't just continue as nothing happened, since the
mask update code would later check if we actually have a mask, so we
need to remember that there was a return in main where we didn't exit
(to illustrate this, a ret in a if clause would cause a mask update
which is still ok as we're in a conditional, but after the endif the
mask update code would drop the mask hence bringing execution back to
pixels which should have their execution mask set to zero by the ret).
Thanks to Christoph Bumiller for figuring this out.
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=62357.
Note: This is a candidate for the stable branches.
Reviewed-by: Jose Fonseca <[email protected]>
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Some fixes for clearing only depth or only stencil.
Signed-off-by: Rob Clark <[email protected]>
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Fixing 16 piglit tests.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Signed-off-by: Christian König <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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v2: remove superfluous mask, use buffer_size instead of constant
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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Cleanup the code and implement indirect addressing.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Tom Stellard <[email protected]>
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v2: further improve the text with comments from Christoph Bumiller.
Signed-off-by: Christian König <[email protected]>
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To further improve the optimization of source and destination
indirect addressing we need the ability to store a reference
to the declaration of the addressed operands.
Since most of the fields in tgsi_src_register doesn't apply for
an indirect addressing operand replace it with a separate
tgsi_ind_register structure and so make room for extra information.
v2: rename Declaration to ArrayID, put the ArrayID into () instead of []
Signed-off-by: Christian König <[email protected]>
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Remember which declarations are declared as "arrays" and so
can be indirectly addressed. ArrayIDs start at 1, cause for
compatibility reasons zero is treaded as no array present.
Signed-off-by: Christian König <[email protected]>
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Nobody seems to be using it, and only nv50 had a partial implementation.
Signed-off-by: Christian König <[email protected]>
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Don't bother with free temporaries, just allocate them at
the end and also emit them in their own declaration.
Signed-off-by: Christian König <[email protected]>
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Instead of emitting each temporary separately, emit them in a chunk.
v2: keep separate function for emitting temps
Signed-off-by: Christian König <[email protected]>
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Ported from downstream:
http://anonscm.debian.org/gitweb/?p=pkg-xorg/lib/mesa.git;a=blob;f=debian/patches/119-libllvmradeon-link.patch;h=ee47f8a07dbf33c32f8b57faed923680ed6648fb;hb=refs/heads/ubuntu%2B1
Fixes a regression introduced with
f70c3853513637fa6ed38e75f73d472a9fa61213
NOTE: This is a candidate for the 9.1 branch.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62434
Signed-off-by: Maarten Lankhorst <[email protected]>
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Needs to be set for depth, stencil, and fmask just
like other blocks.
v2: drop additional cayman bits for now
Signed-off-by: Alex Deucher <[email protected]>
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On cayman, 128bpp surfaces require non_disp ordering for hw
access to both linear and tiled surfaces. When we use the 3D
engine we can set the non_disp ordering on both the tiled and
linear sides (via CB or texture), but when we use the DMA
engine, we can only set the non_disp ordering on the tiled
side, so after a L2T operation with the DMA engine, the data
ends up in the wrong order on the tiled side.
v2: cayman/TN only
v3: fix comments
Fixes:
https://bugs.freedesktop.org/show_bug.cgi?id=60802
Note: this is a candidate for the 9.1 branch.
Signed-off-by: Alex Deucher <[email protected]>
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v2: Andreas Boll <[email protected]>
- Fix formatting - use one CFLAG per line
NOTE: This is a candidate for the 9.1 branch.
Signed-off-by: Maarten Lankhorst <[email protected]>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59238
Reviewed-by: Andreas Boll <[email protected]>
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This involved adding another driOptionCache to dri_screen. The
existing one just held the default values. But now we also need
to have the values from the DRI config file so that we can get at
the always_have_depth_buffer config option, which is per-screen.
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wayland_roundtrip() was given an incorrect parameter.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=62362
Note: This is a candidate for the stable branches.
Signed-off-by: Brian Paul <[email protected]>
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There were two different NUM_ENTRIES #defines for the framebuffer
tile cache and the texture tile cache. Rename the later to fix
the warnings:
In file included from sp_flush.c:40:0:
sp_tex_tile_cache.h:76:0: warning: "NUM_ENTRIES" redefined
sp_tile_cache.h:78:0: note: this is the location of the previous definition
In file included from sp_context.c:50:0:
sp_tex_tile_cache.h:76:0: warning: "NUM_ENTRIES" redefined
sp_tile_cache.h:78:0: note: this is the location of the previous definition
Also, replace occurances of NUM_ENTRIES with Element() macro to
be safer.
Reviewed-by: José Fonseca <[email protected]>
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- each softpipe_tex_tile_cache 50*64*64*4*4 = 3,276,800 bytes
- each softpipe_context has 3*32 softpipe_tex_tile_cache, i.e, each softpipe
context is 314,572,800 bytes, i.e, 300MB
That is, in a 32bits process (around 3GB virtual memory max), we can
only fit 10 contexts.
This change is a short-term hack to shrink the context size. Longer
term we'll need to change how the texture cache works.
Reviewed-by: Brian Paul <[email protected]>
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Those cases were apparently forgotten.
Reviewed-by: Jose Fonseca <[email protected]>
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instead just warn when creating the surface, rendering will simply happen
to first layer.
Reviewed-by: Jose Fonseca <[email protected]>
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We can't handle them yet, however we can safely just warn (we will
just render to first layer, which is fine since we can't handle
rendertarget system value neither).
Also make behavior more predictable with buffer surfaces
(it would sometimes hit bogus asserts because of the union in the surface,
instead create the surface but assert when trying to set a buffer
in the framebuffer).
Reviewed-by: Jose Fonseca <[email protected]>
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Trivial. Matches softpipe's code.
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Signed-off-by: Tom Stellard <[email protected]>
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All the functions in this file are now implemented in C.
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Just delete unused kernels rather than marking them as internal and
running the GlobalDCE pass.
Also implement this function in C and inline it into
radeon_llvm_get_kernel_module()
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Also make the function static since it is not used anywhere else.
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Fixes the scons build.
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Reviewed-by: José Fonseca <[email protected]>
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Reviewed-by: José Fonseca <[email protected]>
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Reviewed-by: José Fonseca <[email protected]>
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Reviewed-by: José Fonseca <[email protected]>
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Fixes autotools build failure. Not sure if there are more, as I have
difficulties in building the full tree.
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Reviewed-by: Eric Anholt <[email protected]>
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One fewer place to have to update.
Reviewed-by: Eric Anholt <[email protected]>
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If geometry shader is present its stream output info should
be used instead of the vs and we shouldn't use the pre-clipped
corrdinates.
Signed-off-by: Zack Rusin <[email protected]>
Reviewed-by: José Fonseca <[email protected]>
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We were in four already...
NOTE: Candidate for the stable branches.
Reviewed-by: Brian Paul <[email protected]>
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In cases where the vertex element size is smaller than the vertex buffer
stride, the previous calculation could end up 1 too low. This would result
in the GPU using index 0 instead of the maximum index for those elements,
which would be visible as intermittent distorted triangles.
NOTE: This is a candidate for the 9.1 branch.
Reviewed-by: Alex Deucher <[email protected]>
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When doing a blit with the 3D engine, the rasterizer or zsa cso may
be NULL.
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