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* radeonsi: set some context vars for nir pathTimothy Arceri2018-03-011-6/+10
* gallium: remove llvm from ir structTimothy Arceri2018-03-011-1/+0
* broadcom/vc5: Fix regression in the page-cache slice size alignment.Eric Anholt2018-02-281-3/+6
* r600/shader: when using images always load thread id gpr at start (v2)Dave Airlie2018-02-281-15/+7
* r600: fix whitespace in recent 1d texture commit.Dave Airlie2018-02-281-1/+1
* swr/rast: revert clip distance precisionGeorge Kyriazis2018-02-282-4/+17
* swr/rast: Faster frustum prim cullingGeorge Kyriazis2018-02-281-3/+7
* swr/rast: Consolidate TRANSLATE_ADDRESSGeorge Kyriazis2018-02-284-6/+28
* swr/rast: Code generation cleanupGeorge Kyriazis2018-02-281-15/+21
* swr/rast: Remove draw type from event definitionsGeorge Kyriazis2018-02-283-12/+8
* swr/rast: whitespace changeGeorge Kyriazis2018-02-281-1/+1
* swr/rast: Fix index buffer overfetch issue for non-indexed drawsGeorge Kyriazis2018-02-281-0/+15
* softpipe: don't iterate through PIPE_MAX_SHADER_SAMPLER_VIEWSRoland Scheidegger2018-02-281-2/+2
* cso: don't cycle through PIPE_MAX_SHADER_SAMPLER_VIEWS on context destroyRoland Scheidegger2018-02-281-1/+3
* draw: don't needlessly iterate through all sampler view slotsRoland Scheidegger2018-02-281-1/+1
* winsys/amdgpu: request high addressesChristian König2018-02-281-4/+12
* r600: partly revert disabling tiling for 1d texture.Dave Airlie2018-02-281-0/+5
* nir: add lower_ldexp to nir compiler optionsTimothy Arceri2018-02-282-0/+2
* ac/radeonsi: add load_base_vertex() to the abiTimothy Arceri2018-02-281-0/+1
* radeonsi: create get_base_vertex() helperTimothy Arceri2018-02-281-14/+20
* radeonsi/nir: disable vertex_id_zero_based loweringTimothy Arceri2018-02-281-1/+0
* nvc0: collapse output slots to have adjacent registersIlia Mirkin2018-02-271-2/+12
* nvir/gm107: consider FILE_FLAGS dependencies in SchedDataCalculatorGM107Karol Herbst2018-02-261-1/+14
* nvir/gm107: iterate over all defs in SchedDataCalculatorGM107::findFirstUseKarol Herbst2018-02-261-16/+18
* radeonsi: remove 2 unused user SGPRs from merged TES-GS with 32-bit pointersMarek Olšák2018-02-264-11/+35
* radeonsi: make SI_SGPR_VERTEX_BUFFERS the last user SGPR inputMarek Olšák2018-02-264-20/+53
* radeonsi: set correct num_input_sgprs for VS prolog in merged shadersMarek Olšák2018-02-261-24/+24
* radeonsi: allow fewer input SGPRs in 2nd shader of merged shadersMarek Olšák2018-02-261-1/+5
* radeonsi: don't use struct si_descriptors for vertex buffer descriptorsMarek Olšák2018-02-266-33/+46
* r600: fix tgsi clock last settingDave Airlie2018-02-261-0/+1
* r600: add time lo/hi debugging output.Dave Airlie2018-02-262-0/+12
* radeonsi/nir: enable lowering of fpowTimothy Arceri2018-02-261-0/+1
* gallium/tgsi: remove is_msaa_sampler array from tgsi_shader_infoTimothy Arceri2018-02-262-7/+0
* radeonsi/nir: fix loading of doubles for tess varyingsTimothy Arceri2018-02-261-2/+10
* radeonsi/nir: fix lds store in tcs outputs handlingTimothy Arceri2018-02-261-1/+1
* r600: Take ALU_EXTENDED into account when evaluating jump offsetsGert Wollny2018-02-261-2/+7
* radeonsi: remove si_descriptors parameter from emit_shader_pointer functionsMarek Olšák2018-02-241-12/+13
* radeonsi: preload the tess offchip ring in TESMarek Olšák2018-02-242-12/+10
* radeonsi: move tess ring address into TCS_OUT_LAYOUT, removes 2 TCS user SGPRsMarek Olšák2018-02-245-91/+70
* radeonsi: move 2nd-shader descriptor pointers into s[0:1]Marek Olšák2018-02-243-74/+140
* radeonsi: change si_descriptors::shader_userdata_offset type to shortMarek Olšák2018-02-242-9/+9
* radeonsi: put both tessellation rings into 1 bufferMarek Olšák2018-02-244-29/+18
* radeonsi: move tessellation ring info into si_screenMarek Olšák2018-02-243-45/+52
* radeonsi: move TCS_OUT_LAYOUT.PatchVerticesIn to lower bitsMarek Olšák2018-02-243-5/+6
* nvir: dont optimize mad with subops to shladdKarol Herbst2018-02-241-1/+2
* broadcom/vc5: Fix layout of 3D textures.Eric Anholt2018-02-232-32/+81
* broadcom/vc5: Ignore unused usage flags in is_format_supported.Eric Anholt2018-02-231-27/+16
* swr: remove dead LLVM code pathsEmil Velikov2018-02-233-28/+0
* broadcom/vc4: Remove the retval==usage check in is_format_supported().Eric Anholt2018-02-231-26/+13
* broadcom/vc4: Add support for YUV textures using unaccelerated blits.Eric Anholt2018-02-233-3/+35
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