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* scons: gallium: link against nir as neededEmil Velikov2016-05-175-1/+5
| | | | | | | | ... otherwise we'll produce uncomplete binaries with introduction of NIR as alternative IR with next commits. Signed-off-by: Emil Velikov <[email protected]> Acked-by: Jose Fonseca <[email protected]>
* nvc0/ir: fix shared atomic lowering to preserve shared memory locationIlia Mirkin2016-05-171-10/+8
| | | | | | | | | | We were always doing atomics on shared memory location 0 instead of the originally supplied location. Make sure to pass through the original symbol and any indirection. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: [email protected] # note: expect minor conflict
* freedreno/ir3: fix compiler warningRob Clark2016-05-171-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* nvc0/ir: make sure out-of-bounds buffer loads/atomics get a 0 resultIlia Mirkin2016-05-171-1/+26
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* vl/dri: Move the DRI3 check out of sources include into C.Jose Fonseca2016-05-162-5/+5
| | | | | | Fixes SCons build. Trivial. Built locally with SCons and autotools.
* st/vdpau: add dri3 supportLeo Liu2016-05-161-1/+5
| | | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/dri3: implement functions for get and set timestampLeo Liu2016-05-161-6/+53
| | | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/dri3: handle PresentCompleteNotify eventLeo Liu2016-05-161-1/+27
| | | | | | | | and get timestamp calculated based on the event's reply Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* st/va: add dri3 supportLeo Liu2016-05-161-1/+5
| | | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/dri3: implement DRI3 BufferFromPixmapLeo Liu2016-05-161-3/+113
| | | | | | | | | | | | We also need render to the front buffer of temporary X pixmap, this is the case of when we using opengl as video out for vaapi. the basic implementation is to pass pixmap ID to X server, and then X will return dma-buf fd, we will get the buffer object through this dma-buf fd. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/dri3: add support for resizingLeo Liu2016-05-161-4/+13
| | | | | | | | | When drawable size changed, PresentConfigureNotify event will be emitted, by handling the event to re-allocate resized buffer. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/dri3: implement funciton for get dirty areaLeo Liu2016-05-161-2/+9
| | | | | | | | This will clear presentation area not covered by video content Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/dri3: implement function for flush frontbufferLeo Liu2016-05-161-2/+30
| | | | | | | | | Request drawable content in pixmap by calling DRI3 PresentPixmap, and handle PresentIdleNotify event. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/dri3: add back buffers supportLeo Liu2016-05-161-2/+185
| | | | | | | | | | | This implements DRI3 PixmapFromBuffer. Create buffer objects, and associate it to a dma-buf fd, and then pass this fd with a pixmap ID to X server for creating pixmap object; also add a function for wait events. Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/dri3: implement flushing for queued eventsLeo Liu2016-05-161-0/+36
| | | | | | | | also place holder for present events handling Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/dri3: register present eventsLeo Liu2016-05-161-0/+27
| | | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/dri3: set drawable geometryLeo Liu2016-05-161-0/+35
| | | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/dri3: add DRI3 support and implement create and destroyLeo Liu2016-05-163-0/+208
| | | | | | | | | | | | | Required functions into place for implementation, create screen with device fd returned from X server, also bail out to DRI2 with certain conditions. v2: -organize the error out path (Axel) -squash previous patch 1 and 2 into one (Emil) Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* clover: grid_offset should be padded with 0 not 1Jan Vesely2016-05-161-1/+1
| | | | | Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* clover: Handle PIPE_SHADER_IR_NIR in switchJan Vesely2016-05-151-1/+2
| | | | | Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* freedreno/ir3: small standalone compiler cleanupRob Clark2016-05-151-2/+1
| | | | | | Don't hard-code the gpu-id anymore. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: lower fdivRob Clark2016-05-151-0/+1
| | | | | | | Not sure how we didn't hit this already, but since we want fdiv converted into mul + rcp, we should set this. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: handle VARYING_SLOT_PNTCRob Clark2016-05-151-0/+12
| | | | | | | In the glsl->tgsi path, this already gets translated to VAR8, which matches up with rasterizer->sprite_coord_enable. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: disable TGSI specific hacks in nir caseRob Clark2016-05-154-2/+7
| | | | | | | When we got NIR directly from state tracker (vs using tgsi_to_nir) we need to realize this and skip some TGSI specific hacks. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add support for NIR as preferred IRRob Clark2016-05-156-18/+61
| | | | | | For now under debug flag, since only suitable for debugging/testing. Signed-off-by: Rob Clark <[email protected]>
* nv50/ir: avoid asserts when the state tracker feeds us bogus inputsIlia Mirkin2016-05-151-12/+48
| | | | | | | | | | | | | | | | | | INTERP is defined (by me) to have to have a INPUT source. However the state tracker does not always obey this. This happens due to varying packing logic introducing additional mov's which can't always be undone. Instead of just giving up, we instead try harder to find the original input. This won't always be possible, for example with indirect accesses. There's not much we can (easily) do about that though. This fixes the remaining interpolateAt* failures in dEQP: dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at* some of which were asserting due to INTERP_* being passed a non-input. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nvc0: don't try to go through the push path for indirect drawsIlia Mirkin2016-05-151-1/+2
| | | | | | | | | | | | | | This fixes dEQP-GLES31.functional.draw_indirect.draw_elements_indirect.*.default_attribute These tests were causing a const vbo to be set up, and were small enough draws that the logic was trying to go via the push path (which emits data directly into the cmd stream rather than uploading a user vbo). Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] Reviewed-by: Samuel Pitoiset <[email protected]>
* nvc0/ir: make sure to align the second arg of TXD to 4, as we do for TEXIlia Mirkin2016-05-151-0/+14
| | | | | | | | | | | | | This was handled in handleTEX(), however the way the logic works, those extra arguments aren't added on by then, so it did nothing. Instead we must duplicate that bit here. GK110 appears to complain about MISALIGNED_GPR, however it's reasonable to believe that GK104 has the same requirements. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95403 Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] Reviewed-by: Samuel Pitoiset <[email protected]>
* nv50,nvc0: add support for cull distancesTobias Klausmann2016-05-1510-11/+33
| | | | | | | | | | | Cull distances are just a special case of clip distances as far as the hardware is concerned. Make sure that the relevant "planes" are enabled, and flip the clip mode to cull for those. Signed-off-by: Tobias Klausmann <[email protected]> [imirkin: add enables on nvc0, add nv50 support] Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tobias Klausmann <[email protected]>
* gallium: Add a pipe cap for arb_cull_distanceTobias Klausmann2016-05-1415-0/+16
| | | | | | | | | This lets us safely enable or disable the extension as needed Signed-off-by: Tobias Klausmann <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi/sid_tables: rename reg_table to sid_reg_tableNicolai Hähnle2016-05-132-3/+3
| | | | | | | | | This is purely cosmetic, making it easier to assign blame for space used in the binary in case somebody else makes a similar cleanup effort in the future. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi/sid_tables: store offset into global fields table instead of pointerNicolai Hähnle2016-05-132-9/+16
| | | | | | | This avoids relocations in the final binary. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi/sid_tables: store strings by offset instead of by pointerNicolai Hähnle2016-05-132-28/+141
| | | | | | | This saves some space and avoids the need for relocations. Acked-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* r600: remove TABLE_SIZE macroNicolai Hähnle2016-05-132-4/+2
| | | | | | | Use ARRAY_SIZE instead. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* r600: move alu_op_table to .c fileNicolai Hähnle2016-05-133-277/+291
| | | | | | | | So that it gets compiled and emitted only once, saving space is the final binary. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* r600: move cf_op_table to .c fileNicolai Hähnle2016-05-132-108/+111
| | | | | | | | So that it gets compiled and emitted only once, saving space is the final binary. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* r600: move fetch_op_table to .c fileNicolai Hähnle2016-05-132-118/+121
| | | | | | | | So that it gets compiled and emitted only once, saving space is the final binary. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* r600: protect r600_isa.h with extern "C"Nicolai Hähnle2016-05-131-0/+8
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/ddebug: Implement launch_grid.Bas Nieuwenhuizen2016-05-131-0/+29
| | | | | | | Does not implement dumping info. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/ddebug: Support compute states.Bas Nieuwenhuizen2016-05-131-16/+40
| | | | | | | | | | | | v2: Reuse the macro for bind & delete. Note that may not be able to share the delete long-term as pipe_compute_state contains members not in pipe_shader_state, and we need to distinguish the pointer location if we add that struct to the union. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/ddebug: Add passthrough for get_compute_param.Bas Nieuwenhuizen2016-05-131-0/+12
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* vl/dri: fix close fd error outLeo Liu2016-05-121-3/+5
| | | | | | fd should be set to -1 only if it got closed by pipe_loader_release. Signed-off-by: Leo Liu <[email protected]>
* nvc0: fix indentation in nvc0_invalidate_resource_storage()Samuel Pitoiset2016-05-121-52/+52
| | | | | | | Trivial. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: save some CPU cycles in nvc0_context_unreference_resources()Samuel Pitoiset2016-05-121-8/+6
| | | | | | | | This reduces the number of loop iterations for invalidating buffers and images. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: invalidate texture buffers for computeSamuel Pitoiset2016-05-121-3/+8
| | | | | | | This is a pretty rare situation but this can happen though. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* swr: properly expose compressed format supportTim Rowley2016-05-122-0/+23
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: fix gl_SampleMaskIn computationIlia Mirkin2016-05-1110-5/+94
| | | | | | | | | | | | | | | | | | | | | The SAMPLEMASK semantic should only return the bits set covered by the current invocation. However we were always retrieving the covmask, which returns the covered samples of the whole pixel. When not doing per-sample invocation, this is precisely what we want. However when doing per-sample invocation, we have to select the sampleid'th bit and only return that. Furthermore, this means that we have to have a 1:1 correlation for invocations and samples. This fixes most dEQP-GLES31.functional.shaders.sample_variables.sample_mask_in.* tests. A few failures remain due to disagreements about nr_samples==1 logic as well as what happens with MSAA x2 RTs when the shading fraction is 0.5. Signed-off-by: Ilia Mirkin <[email protected]>
* nv50/ir: generalize interp fixups to be able to fixup anythingIlia Mirkin2016-05-1110-60/+71
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nir/algebraic: Separate ffma lowering from fusingJason Ekstrand2016-05-111-0/+1
| | | | | | | | The i965 driver has its own pass for fusing mul+add combinations that's much smarter than what nir_opt_algebraic can do so we don't want to get the nir_opt_algebraic one just because we didn't set lower_ffma. Reviewed-by: Kenneth Graunke <[email protected]>
* gallium: add NIR as a possible IRRob Clark2016-05-113-0/+16
| | | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
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