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* gallium/docs: Fixed a typo in the SCS opcode description.Tilman Sauerbeck2010-09-191-1/+1
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* auxiliary: fix depth-only and stencil-only clearsLuca Barbieri2010-09-191-1/+1
| | | | | | | Depth-only and stencil-only clears should mask out depth/stencil from the output, mask out stencil/input from input, and OR or ADD them together. However, due to a typo they were being ANDed, resulting in zeroing the buffer.
* r600g: Buffer object maps imply a wait.Henri Verbeet2010-09-196-42/+13
| | | | Unless e.g. PB_USAGE_DONTBLOCK or PB_USAGE_UNSYNCHRONIZED would be specified.
* r600g: Remove a redundant flush in r600_texture_transfer_map().Henri Verbeet2010-09-191-1/+0
| | | | radeon_ws_bo_map() will already take care of that if needed.
* r600g: Check for other references before checking for existing mappings in ↵Henri Verbeet2010-09-191-6/+8
| | | | | | | radeon_bo_pb_map_internal(). Having a non-NULL data pointer doesn't imply it's safe to reuse that mapping, it may have been unmapped but not flushed yet.
* r600g: Flush upload buffers before draws instead of before flushes.Henri Verbeet2010-09-192-4/+5
| | | | | | | | | | If a upload buffer is used by a previous draw that's still in the CS, accessing it would need a context flush. However, doing a context flush when mapping the upload buffer would then flush/destroy the same buffer we're trying to map there. Flushing the upload buffers before a draw avoids both the CS flush and the upload buffer going away while it's being used. Note that u_upload_data() could e.g. use a pool of buffers instead of allocating new ones all the time if that turns out to be a significant issue.
* st/egl: s/kms/drm/ on the drm backend.Chia-I Wu2010-09-193-303/+303
| | | | s/kms/drm/, s/kdpy/drmdpy/, and so forth.
* st/egl: Rename kms backend to drm.Chia-I Wu2010-09-196-19/+19
| | | | | The main use of the backend is to support EGL_MESA_drm_display. drm should be a better name.
* st/egl: Split modeset code support to modeset.c.Chia-I Wu2010-09-193-587/+647
| | | | | The modeset code supports now obsolete EGL_MESA_screen_surface. Move it to a file of its own.
* r600g: only emit uses waterfall on r6xx hw.Dave Airlie2010-09-191-1/+1
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* r600g; add uses waterfall to asm cf for r6xx.Dave Airlie2010-09-193-0/+3
| | | | On r6xx if an MOVA instruction is emitted we should set this bit.
* r600g: Added support for TGSI_SEMANTIC_FACE.Tilman Sauerbeck2010-09-192-2/+16
| | | | | | This makes the 'glsl1-gl_FrontFacing var (1)' piglit test pass. Signed-off-by: Tilman Sauerbeck <[email protected]>
* nv50: Remove dead initialization.Vinson Lee2010-09-181-1/+1
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* nv50: Remove dead initialization.Vinson Lee2010-09-181-1/+1
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* nv50: Silence missing initializer warning.Vinson Lee2010-09-181-1/+1
| | | | | | Fixes this GCC warning. nv50_state_validate.c:336: warning: missing initializer nv50_state_validate.c:336: error: (near initialization for 'validate_list[20].func')
* nv50: fix typo in fifo packet length limitChristoph Bumiller2010-09-182-2/+6
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* nv50: emit constbuf relocs before uploading constantsChristoph Bumiller2010-09-183-21/+56
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* nv50: add relocs for stack and local mem buffersChristoph Bumiller2010-09-185-3/+31
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* r600g: Remove unused variable.Vinson Lee2010-09-181-1/+0
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* nvfx: Silence uninitialized variable warnings.Vinson Lee2010-09-181-0/+2
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* nvfx: Remove const qualifer from nvfx_vertprog_translate.Vinson Lee2010-09-181-1/+1
| | | | | | Silences this GCC warning. nvfx_vertprog.c: In function 'nvfx_vertprog_translate': nvfx_vertprog.c:998: warning: assignment discards qualifiers from pointer target type
* r600g: Silence unused variable warnings.Vinson Lee2010-09-171-0/+2
| | | | The variables are used in code that is currently ifdef'ed out.
* r600g: Silence uninitialized variable warning.Vinson Lee2010-09-171-1/+2
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* r600g: Fix memory leak on error path.Vinson Lee2010-09-171-1/+1
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* r600g: Fix implicit declaration warning.Vinson Lee2010-09-171-0/+1
| | | | | | Fixes this GCC warning. r600_state2.c: In function 'r600_context_flush': r600_state2.c:946: error: implicit declaration of function 'drmCommandWriteRead'
* r600g: Remove unnecessary headers.Vinson Lee2010-09-171-3/+0
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* r600g: Remove unnecessary header.Vinson Lee2010-09-171-1/+0
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* llvmpipe: Default to no threading on single processor systems.José Fonseca2010-09-171-2/+1
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* util: linearized sRGB values don't fit into 8bitsJosé Fonseca2010-09-171-0/+8
| | | | Fixes glean texture_srgb test.
* gallivm: added missing case for PIPE_TEXTURE_RECTBrian Paul2010-09-171-0/+1
| | | | Fixes fd.o bug 30245
* r600g: alternative command stream building from contextJerome Glisse2010-09-1714-25/+5913
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Winsys context build a list of register block a register block is a set of consecutive register that will be emited together in the same pm4 packet (the various r600_block* are there to provide basic grouping that try to take advantage of states that are linked together) Some consecutive register are emited each in a different block, for instance the various cb[0-7]_base. At winsys context creation, the list of block is created & an index into the list of block. So to find into which block a register is in you simply use the register offset and lookup the block index. Block are grouped together into group which are the various pkt3 group of config, context, resource, Pipe state build a list of register each state want to modify, beside register value it also give a register mask so only subpart of a register can be updated by a given pipe state (the oring is in the winsys) There is no prebuild register list or define for each pipe state. Once pipe state are built they are bound to the winsys context. Each of this functions will go through the list of register and will find into which block each reg falls and will update the value of the block with proper masking (vs/ps resource/constant are specialized variant with somewhat limited capabilities). Each block modified by r600_context_pipe_state_set* is marked as dirty and we update a count of dwords needed to emit all dirty state so far. r600_context_pipe_state_set* should be call only when pipe context change some of the state (thus when pipe bind state or set state) Then to draw primitive you make a call to r600_context_draw void r600_context_draw(struct r600_context *ctx, struct r600_draw *draw) It will check if there is enough dwords in current cs buffer and if not will flush. Once there is enough room it will copy packet from dirty block and then add the draw packet3 to initiate the draw. The flush will send the current cs, reset the count of dwords to 0 and remark all states that are enabled as dirty and recompute the number of dwords needed to send the current context. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: Fixed the shift in S_02880C_KILL_ENABLE.Tilman Sauerbeck2010-09-172-2/+2
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Enable PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED.Tilman Sauerbeck2010-09-171-2/+1
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Only set PA_SC_EDGERULE on rv770 and greater.Tilman Sauerbeck2010-09-171-2/+14
| | | | | | This is what xf86-video-ati and r600c do. Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Added DB_SHADER_CONTROL defines.Tilman Sauerbeck2010-09-174-6/+46
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Formatting fixes.Tilman Sauerbeck2010-09-171-27/+26
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: oops got the use_mem_constant the wrong way around.Dave Airlie2010-09-181-1/+1
| | | | this fixes evergreen gears again.
* r600g: use calloc for ctx bo allocationsDave Airlie2010-09-171-1/+1
| | | | since the reference code relies on these being NULL.
* r600g: fixup map flushing.Dave Airlie2010-09-171-5/+9
| | | | | | long lived maps were getting removed when they shouldn't this tries to avoid that problem by only adding to the flush list on unmap.
* r600g: add upload manager support.Dave Airlie2010-09-176-47/+223
| | | | | | this add support for the upload manager for uploading user vbo/index buffers. this provides a considerable speedup in q3 type games.
* r600g: add winsys bo caching.Dave Airlie2010-09-174-31/+24
| | | | | | | this adds the bo caching layer and uses it for vertex/index/constant bos. ctx needs to take references on hw bos so the flushing works okay, also needs to flush the maps.
* r600g: add support for kernel boDave Airlie2010-09-1710-50/+352
| | | | this moves to using a pb bufmgr instead of kernel bos directly.
* r600g: use malloc bufmgr for constant buffersDave Airlie2010-09-173-1/+9
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* r600g: move constant buffer creation behind winsys abstraction.Dave Airlie2010-09-1712-55/+65
| | | | this paves the way for moving to pb bufmgrs now.
* libgl-xlib: Remove unused st_api_create_OpenGL.Chia-I Wu2010-09-171-8/+0
| | | | st/egl no longer relies on libGL for OpenGL support.
* targets/egl: Use C++ compiler to link GL/ES state trackers.Chia-I Wu2010-09-171-3/+10
| | | | | Otherwise, applications compiled with C compiler might have trouble using them.
* tgsi/sse: fix aos_to_soa() loop to handle num_inputs==0Brian Paul2010-09-161-6/+9
| | | | | | | | | Basically, change the loop from: do {...} while (--num_inputs != 0) into: while (num_inputs != 0) { ... --num_inputs; } Fixes fd.o bug 29987.
* r600g: attempt to abstract kernel bos from pipe driver.Dave Airlie2010-09-1719-199/+272
| | | | | | introduce an abstraction layer between kernel bos and the winsys BOs. this is to allow plugging in pb manager with minimal disruption to pipe driver.
* r600g: hide radeon_ctx inside winsys.Dave Airlie2010-09-178-56/+42
| | | | no need for this info to be exported to pipe driver.
* gallivm: Remove unnecessary header.Vinson Lee2010-09-161-1/+0
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