summaryrefslogtreecommitdiffstats
path: root/src/gallium
Commit message (Expand)AuthorAgeFilesLines
* freedreno/ir3/sched: fixup new instr's blockRob Clark2015-07-101-0/+4
* freedreno/ir3/ra: fix failed assert for a0/p0Rob Clark2015-07-101-0/+5
* freedreno/ir3: shader-db tracesRob Clark2015-07-107-8/+67
* freedreno: fix crash in fd_invalidate_resource()Rob Clark2015-07-101-2/+2
* vc4: unref old fenceRob Clark2015-07-101-0/+2
* ilo: unref old fenceRob Clark2015-07-101-0/+2
* freedreno: unref old fenceRob Clark2015-07-101-1/+3
* gallium: clarify reference counting for fenceRob Clark2015-07-101-1/+7
* xa: don't leak fencesRob Clark2015-07-103-3/+7
* tgsi: whitespace fixes in tgsi_parse.cBrian Paul2015-07-091-13/+13
* gallium: fix comment typo in p_shader_tokens.hBrian Paul2015-07-091-1/+1
* gallium/docs: s/treaded/treated/ typo in tgsi.rstBrian Paul2015-07-091-1/+1
* st/vdpau: fix mixer size checksChristian König2015-07-091-11/+11
* vl: cleanup video buffer private when the decoder is destroyedChristian König2015-07-092-0/+28
* nv50: avoid segfault with enabled but unbound vertex attribSamuel Pitoiset2015-07-081-0/+5
* nvc0: fix wrong use of BLIT_SRC_Y_INT for 2D texture copySamuel Pitoiset2015-07-081-1/+1
* android: freedreno: add missing components to the buildVarad Gautam2015-07-081-1/+4
* nvc0: turn sample counts off during blitIlia Mirkin2015-07-071-0/+7
* st/dri: don't set PIPE_BIND_SCANOUT for MSAA surfacesMarek Olšák2015-07-071-1/+1
* gallium/hud: display percentages with % suffixBrian Paul2015-07-071-0/+3
* gallium/hud: add PIPE_DRIVER_QUERY_TYPE_MICROSECONDS for HUDBrian Paul2015-07-072-10/+26
* gallium/hud: replace byte units flag with pipe_driver_query_typeBrian Paul2015-07-073-16/+18
* gallium/os: minor whitespace fixes in os_time.hBrian Paul2015-07-071-5/+6
* radeonsi: Use param export count from si_llvm_export_vs in si_shader_vsMichel Dänzer2015-07-073-22/+6
* gallivm: fix lp_build_compare_extRoland Scheidegger2015-07-062-1/+4
* winsys/radeon: use os_wait_until_zero in radeon_bo_set_tilingMarek Olšák2015-07-051-3/+1
* radeonsi: don't flush an empty IB if the only thing we need is a fenceMarek Olšák2015-07-053-3/+15
* gallium/os: add conversion and wait functions for absolute timeoutsMarek Olšák2015-07-052-0/+67
* gallium/os: add os_wait_until_zero (v2)Marek Olšák2015-07-052-1/+48
* gallium/radeon: mark the gpu load thread stop trigger as volatileMarek Olšák2015-07-051-1/+1
* gallium: remove redundant pipe_context::fence_signalledMarek Olšák2015-07-0513-131/+0
* gallium: use fence_finish instead of fence_signalled in state trackersMarek Olšák2015-07-054-4/+4
* gallium: handle fence_finish timeout in various driversMarek Olšák2015-07-055-0/+15
* gallium/docs: remove out-of-date document about D3D11 featuresMarek Olšák2015-07-051-462/+0
* radeonsi: fix a hang with DrawTransformFeedback on 4 SE chipsMarek Olšák2015-07-051-0/+4
* nv50/ir: UCMP arguments are float, so make sure modifiers are appliedIlia Mirkin2015-07-031-1/+2
* winsys/radeon: Use dup fd as key in drm-winsys hash table to fix ZaphodHeads.Mario Kleiner2015-07-031-3/+10
* r600g: disable single-sample fast color clear due to hangsMarek Olšák2015-07-031-1/+6
* r600g,radeonsi: implement get_device_reset_statusMarek Olšák2015-07-036-4/+38
* freedreno/ir3: don't be confused by eliminated indirectsRob Clark2015-07-032-0/+14
* freedreno/ir3: sched fixes for addr register usageRob Clark2015-07-031-12/+65
* freedreno/ir3: fix indirects trackingRob Clark2015-07-035-10/+23
* gallium/ttn: mark location specially in nir for color0-writes-allIlia Mirkin2015-07-033-1/+16
* gallium/ttn: IN/OUT are only array if ArrayID != 0Rob Clark2015-07-031-62/+81
* tgsi: update docs for ArrayID usageRob Clark2015-07-031-0/+1
* nv50/ir: don't emit src2 in immediate formIlia Mirkin2015-07-021-2/+2
* nvc0: tune PREFER_BLIT_BASED_TEXTURE_TRANSFER capabilityAlexandre Courbot2015-07-011-1/+2
* nvc0: create screen fence objects with coherent attributeAlexandre Courbot2015-07-021-2/+6
* ilo: remove ilo_image_paramsChia-I Wu2015-07-011-75/+47
* ilo: add image_init_gen6_transfer_layout()Chia-I Wu2015-07-011-75/+37