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* ilo: unblock an inline write with a staging boChia-I Wu2014-07-281-13/+31
* ilo: try unblocking a transfer with a staging boChia-I Wu2014-07-284-19/+209
* ilo: enable persistent and coherent transfersChia-I Wu2014-07-283-8/+35
* ilo: drop ptr from ilo_transferChia-I Wu2014-07-282-35/+36
* ilo: s/TRANSFER_MAP_UNSYNC/TRANSFER_MAP_GTT_UNSYNC/Chia-I Wu2014-07-282-6/+6
* ilo: drop unused context param from transfer functionsChia-I Wu2014-07-281-115/+100
* ilo: tidy up transfer mapping/unmappingChia-I Wu2014-07-281-88/+89
* ilo: tidy up choose_transfer_method()Chia-I Wu2014-07-281-84/+164
* ilo: free transfers with util_slab_free()Chia-I Wu2014-07-281-1/+1
* clover: Add clUnloadPlatformCompiler.EdB2014-07-282-1/+6
* clover: Add clCreateProgramWithBuiltInKernels.EdB2014-07-282-1/+23
* ilo: simplify ilo_flush()Chia-I Wu2014-07-263-20/+30
* r600g/compute: Defrag the pool at the same time as we grow itBruno Jiménez2014-07-252-23/+19
* r600g/compute: Try to use a temporary resource when growing the poolBruno Jiménez2014-07-251-18/+43
* freedreno: fix typo in gpu version checkRob Clark2014-07-251-1/+1
* freedreno/ir3: split out shader compiler from a3xxRob Clark2014-07-2525-477/+580
* freedreno/a3xx/compiler: rename ir3_shader to ir3Rob Clark2014-07-2512-55/+55
* freedreno/a3xx/compiler: scheduler vs pred regRob Clark2014-07-252-3/+51
* freedreno/a3xx/compiler: little cleanupsRob Clark2014-07-254-39/+19
* freedreno/a3xx: enable/disable wa's based on patch-levelRob Clark2014-07-254-8/+34
* freedreno/a3xx/compiler: make IR heap dyanmicRob Clark2014-07-252-8/+43
* r600g/compute: Fix singed/unsigned comparison compiler warnings.Jan Vesely2014-07-251-7/+7
* clover: Query the device to see if images are supportedTom Stellard2014-07-253-1/+8
* gallium: Add PIPE_CAP_COMPUTE_IMAGES_SUPPORTEDTom Stellard2014-07-253-1/+11
* r600g/compute: Allow compute_memory_defrag to defragment between resourcesBruno Jiménez2014-07-252-5/+7
* r600g/compute: Allow compute_memory_move_item to move items between resourcesBruno Jiménez2014-07-252-16/+16
* winsys/radeon: fix indentationJerome Glisse2014-07-241-29/+29
* nvc0/ir: support 2d constbuf indexingIlia Mirkin2014-07-241-0/+14
* gm107/ir: emit LDC subopsIlia Mirkin2014-07-241-0/+1
* gk110/ir: emit load constant subopIlia Mirkin2014-07-241-0/+1
* nv50/ir: fix phi/union sources when their def has been mergedIlia Mirkin2014-07-241-0/+8
* nv50/ir: fix hard-coded TYPE_U32 sized registerIlia Mirkin2014-07-241-3/+4
* nvc0: mark shader header if fp64 is usedIlia Mirkin2014-07-241-0/+2
* nv50/ir: keep track of whether the program uses fp64Ilia Mirkin2014-07-242-2/+7
* nvc0: make sure that the local memory allocation is aligned to 0x10Ilia Mirkin2014-07-241-1/+1
* ilo: check the tilings of imported handlesChia-I Wu2014-07-241-30/+36
* ilo: clean up resource bo renamingChia-I Wu2014-07-244-51/+63
* ilo: share some code between {tex,buf}_create_boChia-I Wu2014-07-241-59/+55
* ilo: use native 3-component vertex formats on GEN7.5+Chia-I Wu2014-07-242-1/+6
* ilo: allow for device-dependent format translationChia-I Wu2014-07-245-32/+39
* freedreno/a3xx/compiler: fix p0 (kill, etc)Rob Clark2014-07-231-1/+2
* Revert "r600g/compute: Fix warnings"Tom Stellard2014-07-232-16/+12
* radeon/llvm: fix formattingGrigori Goronzy2014-07-231-10/+14
* radeon/llvm: enable unsafe math for graphics shadersGrigori Goronzy2014-07-231-0/+5
* r600g/compute: Fix warningsTom Stellard2014-07-232-12/+16
* r600g: Use hardware sqrt instructionGlenn Kennard2014-07-232-7/+4
* r600g/compute: Remove unneeded code from compute_memory_promote_itemBruno Jiménez2014-07-232-36/+12
* r600g/compute: Quick exit if there's nothing to add to the poolBruno Jiménez2014-07-231-0/+4
* r600g/compute: Defrag the pool if it's necesaryBruno Jiménez2014-07-232-17/+19
* r600g/compute: Add a function for defragmenting the poolBruno Jiménez2014-07-232-0/+28
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