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* freedreno/a3xx: fix const confusionRob Clark2014-02-012-9/+9
| | | | | | | | | | | | Gallium can leave const buffers bound above what is used by the current shader. Which can have a couple bad effects: 1) write beyond const space assigned, which can trigger HLSQ lockup 2) double emit of immed consts, first with bound const buffer vals followed by with actual immed vals. This seems to be a sort of undefined condition. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: compiler cleanupsRob Clark2014-02-017-145/+198
| | | | | | Drop color/pos/psize_regid, plus a few compiler and IR cleanups. Signed-off-by: Rob Clark <[email protected]>
* freedreno/compiler/a3xx: remove lowered instructionsRob Clark2014-02-011-354/+0
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: add tgsi lowering passRob Clark2014-02-014-2/+1229
| | | | | | | | | | | | | | | | Currently lowers the following instructions: DST, XPD, SCS, LRP, FRC, POW, LIT, EXP, LOG, DP4, DP3, DPH, DP2 translating these into equivalent simpler TGSI instructions. This probably should be moved to util so other drivers can use it, but just adding under freedreno for now so that I can clear out a lot of the lowering code in a3xx compiler before beginning to add new compiler. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: add CLAMPRob Clark2014-02-011-7/+24
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: various fixesRob Clark2014-02-011-14/+34
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: ctx should hold ref to devRob Clark2014-02-017-3/+9
| | | | | | | | The ctx should hold ref to dev to avoid problems if screen is destroyed before ctx. Doesn't really fix the egl/glx issues, but at least it prevents things from getting much worse. Signed-off-by: Rob Clark <[email protected]>
* freedreno: add prims-emitted driver queryRob Clark2014-02-011-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* llvmpipe: fix denorm handling for r11g11b10_float format when blendingRoland Scheidegger2014-01-311-2/+15
| | | | | | | | The code re-enabling denorms for small float formats did not recognize this format due to format handling hacks (mainly, the lp_type doesn't have the floating bit set). Reviewed-by: Jose Fonseca <[email protected]>
* st/dri: Fix tests for no draw/read buffers in dri_make_current()Michel Dänzer2014-01-311-2/+2
| | | | | | Fixes piglit glx/GLX_ARB_create_context/current with no framebuffer. Reviewed-by: Marek Olšák <[email protected]>
* r600g: Removed unnecessary positivity check for unsigned int variable.Siavash Eliasi2014-01-311-1/+1
| | | | Signed-off-by: Marek Olšák <[email protected]>
* st/dri: Allow creating OpenGL 3.3 core contextsMichel Dänzer2014-01-301-1/+1
| | | | | | Enables OpenGL 3.3 piglit tests. Reviewed-by: Marek Olšák <[email protected]>
* freedreno: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Ian Romanick2014-01-291-0/+3
| | | | | | | | Allocations actually have page alignment, but 64 is still a reasonable value. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* ilo: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+1
| | | | | | | | | | Ian manually ran the map_buffer_range* tests and the arb_map_buffer_alignment-* tests, but he did not do a full piglit run. v2 (idr): Use 64 instead of 4096 Tested-by: Ian Romanick <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* svga: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+2
| | | | | | | v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly. Reviewed-by: Ian Romanick <[email protected]>
* i915g: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+3
| | | | | v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly.
* i915g: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi2014-01-291-1/+1
| | | | Reviewed-by: Ian Romanick <[email protected]>
* llvmpipe: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+2
| | | | | | | v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly. Reviewed-by: Ian Romanick <[email protected]>
* llvmpipe: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi2014-01-291-3/+3
| | | | | | v2: Changed allocation alignment of llvmpipe_displaytarget_layout. Reviewed-by: Ian Romanick <[email protected]>
* softpipe: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+2
| | | | | | | v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly. Reviewed-by: Ian Romanick <[email protected]>
* softpipe: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi2014-01-291-2/+2
| | | | | | v2: Changed allocation alignment in softpipe_displaytarget_layout. Reviewed-by: Ian Romanick <[email protected]>
* i915g: support more PIPE_CAPsStéphane Marchesin2014-01-281-3/+6
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* radeonsi: Put GS ring buffer descriptors with streamout buffer descriptorsMichel Dänzer2014-01-295-84/+115
| | | | | | And mark the constant buffers as read only for the GPU again. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Enable OpenGL 3.3Michel Dänzer2014-01-291-3/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Geometry shader micro-optimizationsMichel Dänzer2014-01-291-12/+10
| | | | | | | | Move parameter loads out of loops, and use the instruction offset instead of a VGPR for the vertex attribute offset when writing to the ESGS ring buffer. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: We don't support indirect addressing of geometry shader inputsMichel Dänzer2014-01-291-0/+4
| | | | | | Fixes piglit spec/glsl-1.50/execution/geometry/dynamic_input_array_index Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Pass VS resource descriptors to the HW ES shader stage as wellMichel Dänzer2014-01-296-34/+58
| | | | | | | This makes sure constants and samplers work in the vertex shader even when a geometry shader is active. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Fix streamout from geometry shaderMichel Dänzer2014-01-291-10/+27
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Simplify shader PM4 state handlingMichel Dänzer2014-01-293-61/+21
| | | | | | | | | | Just always bind the current states before drawing. Besides the simplification, as a bonus this makes sure the VS hardware shader stage always uses the GS copy shader when a geometry shader is active, fixing a number of GS related piglit tests. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Properly match ES outputs to GS inputsMichel Dänzer2014-01-291-5/+16
| | | | | | Fixes piglit vs-gs-arrays-within-blocks-pass. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Really dump TGSI code before any TGSI->LLVM conversion attemptMichel Dänzer2014-01-291-8/+8
| | | | | | While we're at it, use the local variable 'sel'. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Also export clip distances with geometry shaderMichel Dänzer2014-01-292-5/+9
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Take GS into account for VS state in more placesMichel Dänzer2014-01-293-2/+14
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Handle adjacency primitivesMichel Dänzer2014-01-291-4/+4
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Handle TGSI_SEMANTIC_PRIMIDMichel Dänzer2014-01-293-2/+16
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Generalize counting of shader parametersMichel Dänzer2014-01-293-38/+48
| | | | | | Now it covers ES->GS as well as VS->PS. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Fix handling of geometry shader output vertex IDMichel Dänzer2014-01-291-7/+19
| | | | | | | | | It needs to increment at shader runtime, not at shader compile time, as the geometry shader can emit vertices in loops. LLVM automagically converts the ID back to an immediate value if its value can be determined at compile time. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Initial geometry shader supportMichel Dänzer2014-01-2911-191/+1084
| | | | | | | Partly based on the corresponding r600g work by Vadim Girlin and Dave Airlie. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Refactor shader input / output handling codeMichel Dänzer2014-01-291-218/+268
| | | | | | In preparation for adding geometry shader support. Reviewed-by: Marek Olšák <[email protected]>
* r600g,radeonsi: Don't set resource_create in r600_common_screen_init()Tom Stellard2014-01-282-1/+1
| | | | | | | | r600g and radeonsi have different implementations of resource_create. https://bugs.freedesktop.org/show_bug.cgi?id=74139 Reviewed-by: Marek Olšák <[email protected]>
* gallivm: Workaround http://llvm.org/PR18600José Fonseca2014-01-281-2/+4
| | | | | | | | | | | | | | | | | | We have code generation paths that carry out swizzles of AoS vectors via bitwise shifts, as these tend to generate more efficient code than straightforward byte shuffles. But when the input is a constant the additional bitwise arithmetic operations somehow don't really get constant propagated properly, evenutally causing assertion failure in InstCombine pass. Therefore avoid the bug by using the trivial shuffles for constant inputs. Although the sample LLVM IR can cause a crash with any LLVM version, this was only seen in practice with LLVM 3.2. Reviewed-by: Matthew McClure <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* r600g: s/r600_llvm_gpu_string/r600_get_llvm_processor_name/Michel Dänzer2014-01-281-1/+1
| | | | | | Fixes build failure introduced by commit 65dc588bfd3b8145131340ffe77f216be58378ac ('r600g,radeonsi: consolidate get_compute_param'), which consolidated the former into the latter.
* radeonsi: cleanup includes, add missing licenseMarek Olšák2014-01-2812-86/+49
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: remove open-coded PS_PARTIAL_FLUSH eventMarek Olšák2014-01-281-5/+3
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: move some inline functions from si_pipe.h to si_state.cMarek Olšák2014-01-282-39/+30
| | | | | | | | | And si_tex_aniso_filter is unused. v2: remove INLINE occurences Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: remove si_resource.hMarek Olšák2014-01-284-50/+13
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: remove si.hMarek Olšák2014-01-283-45/+5
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: move si_upload_const_buffer to a better placeMarek Olšák2014-01-285-70/+29
| | | | | | | This gets rid of another file. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: inline si_translate_index_bufferMarek Olšák2014-01-284-60/+19
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: inline si_upload_index_bufferMarek Olšák2014-01-283-13/+2
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
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