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* llvmpipe: implement so_overflow queryZack Rusin2013-04-263-0/+15
| | | | | | Signed-off-by: Zack Rusin <[email protected]> Reviewed-by: José Fonseca <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: replace LP_MAX_THREADS with screen->num_threads in query codeBrian Paul2013-04-261-2/+4
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: bump LP_MAX_THREADS to 16Brian Paul2013-04-261-1/+1
| | | | | | | On the mesa-users list, Burlen Loring reported a speed-up with 16 cores and his test/app. Reviewed-by: Roland Scheidegger <[email protected]>
* r600/uvd: stop advertising MPEG4 on UVD 2.x chips v2Christian König2013-04-264-2/+18
| | | | | | | | | That is just not supported by the hardware. v2: fix compare Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeon/uvd: stop using anonymous unionsChristian König2013-04-264-39/+39
| | | | Signed-off-by: Christian König <[email protected]>
* Revert "draw: Yield zeros for LLVM fetches of non-existing vertex elements."José Fonseca2013-04-261-16/+10
| | | | | | | | After more thought/discussion, it seems it is better to handle this sort of stuff in the state tracker. So this reverts commit 12096f334b82340dc165ed15e6f8f44d4cf94df4, except the variant->key -> key shorthands.
* ilo: add the driver to the build systemChia-I Wu2013-04-267-0/+159
| | | | | Add ilo to targets/egl-static and add a new target dri-ilo. Update autoconf and automake rules.
* ilo: compile VS/GS/FS with the toy compilerChia-I Wu2013-04-266-20/+4460
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* ilo: add a toy shader compilerChia-I Wu2013-04-2614-1/+8669
| | | | | | | | | This is a simple shader compiler that performs almost zero optimizations. The generated code is usually much larger comparing to that generated by i965. The generated code also requires many more registers. Function-wise, it lacks register spilling and does not support most TGSI indirections. Other than those, it works alright.
* ilo: hook up pipe context GPGPU functionsChia-I Wu2013-04-261-1/+12
| | | | This just adds a stub.
* ilo: hook up pipe context video functionsChia-I Wu2013-04-261-2/+28
| | | | This just hooks them up with auxiliary/vl layer.
* ilo: add support for time/occlusion/primitive queriesChia-I Wu2013-04-263-5/+293
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* ilo: hook up pipe context 3D functionsChia-I Wu2013-04-264-5/+287
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* ilo: add GEN7 support for 3D pipelineChia-I Wu2013-04-267-2/+954
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* ilo: add 3D pipeline for GEN6Chia-I Wu2013-04-266-0/+3034
| | | | | The 3D pipeline is a high-level interface to emit 3D commands and states. It uses GEN6 GPE to do the real work.
* ilo: add GEN7 GPEChia-I Wu2013-04-263-0/+2367
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* ilo: add GEN6 GPEChia-I Wu2013-04-265-0/+5270
| | | | | GEN6 GPE (Graphics Processing Engine) is a low-level interface to emit 3D commands and states.
* ilo: hook up pipe context query functionsChia-I Wu2013-04-262-5/+208
| | | | None of the query types are supported yet.
* ilo: hook up pipe context transfer functionsChia-I Wu2013-04-261-4/+239
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* ilo: hook up pipe context blit functionsChia-I Wu2013-04-263-5/+269
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* ilo: hook up pipe context state functionsChia-I Wu2013-04-264-61/+1148
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* ilo: add functions to manage shadersChia-I Wu2013-04-264-0/+899
| | | | | This commits add shader cache, shader state, shader variant, and etc. It does not add the shader compiler though.
* ilo: hook up pipe context flush functionChia-I Wu2013-04-262-1/+79
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* ilo: add command parserChia-I Wu2013-04-263-0/+649
| | | | The command parser manages batch buffers and command submissions.
* ilo: hook up pipe screen resource functionsChia-I Wu2013-04-262-5/+856
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* ilo: hook up pipe screen format functionsChia-I Wu2013-04-262-2/+683
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* ilo: hook up pipe_screen param and fence functionsChia-I Wu2013-04-263-11/+606
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* ilo: add debug flags settable through ILO_DEBUGChia-I Wu2013-04-262-0/+28
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* ilo: new pipe driver for Intel GEN6+Chia-I Wu2013-04-2628-0/+4887
| | | | | This commit adds some boilerplate code. The header files found under include/ are copied from i965.
* winsys/intel: new winsys for intelChia-I Wu2013-04-265-0/+946
| | | | | This is a wrapper for libdrm_intel to allow the pipe driver to stay OS agnostic.
* gallivm: Fix trivial out-of-bounds indirection in lp_build_cube_lookup().José Fonseca2013-04-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Courtesy of clang: src/gallium/auxiliary/gallivm/lp_bld_sample.c:1483:10: warning: array index of '2' indexes past the end of an array (that contains 2 elements) [-Warray-bounds] tmp[2] = lp_build_swizzle_aos(coord_bld, ddx_ddy[1], swizzle02); ^ ~ src/gallium/auxiliary/gallivm/lp_bld_sample.c:1430:10: note: array 'tmp' declared here LLVMValueRef ddx_ddy[2], tmp[2], rho_vec; ^ src/gallium/auxiliary/gallivm/lp_bld_sample.c:1487:56: warning: array index of '2' indexes past the end of an array (that contains 2 elements) [-Warray-bounds] rho_vec = lp_build_add(coord_bld, rho_vec, tmp[2]); ^ ~ src/gallium/auxiliary/gallivm/lp_bld_sample.c:1430:10: note: array 'tmp' declared here LLVMValueRef ddx_ddy[2], tmp[2], rho_vec; ^ src/gallium/auxiliary/gallivm/lp_bld_sample.c:1491:56: warning: array index of '2' indexes past the end of an array (that contains 2 elements) [-Warray-bounds] rho_vec = lp_build_max(coord_bld, rho_vec, tmp[2]); ^ ~ src/gallium/auxiliary/gallivm/lp_bld_sample.c:1430:10: note: array 'tmp' declared here LLVMValueRef ddx_ddy[2], tmp[2], rho_vec; ^
* winsys/radeon: consolidate tracing into winsys v2Jerome Glisse2013-04-2516-95/+68
| | | | | | | | | | | | This move the tracing timeout and printing into winsys and add an debug environement variable for it (R600_DEBUG=trace_cs). Lot of file touched because of winsys API changes. v2: Do not write lockup file if ib uniq id does not match last one Signed-off-by: Jerome Glisse <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g/compute: Removed unused and untested codeTom Stellard2013-04-255-776/+66
| | | | | | | | There was a lot of code in evergreen_compute_internal.c that was not being used at all and most of it was duplicating code from other parts of the driver. Reviewed-by: Alex Deucher <[email protected]>
* r600g/compute: Use a constant buffer to store kernel parameters v2Tom Stellard2013-04-252-16/+30
| | | | | | | | | v2: - Fix usage of set_constant_buffer() - Fix typo in comment Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: Add evergreen_emit_cs_constant_buffers() v2Tom Stellard2013-04-253-11/+36
| | | | | | | | v2: - Bump R600_NUM_ATOMS Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g/compute: Don't use radeon_winsys::buffer_wait() after dispatching a kernelTom Stellard2013-04-251-6/+0
| | | | | | | The state tracker should be responsible for waiting for the kernel to finish. Reviewed-by: Alex Deucher <[email protected]>
* r600g/compute: Fix input buffer size calculationTom Stellard2013-04-251-1/+1
| | | | | | Buffer size should be in bytes not dwords. Reviewed-by: Alex Deucher <[email protected]>
* freedreno: use writecombine buffersRob Clark2013-04-251-1/+2
| | | | | | | Better than uncached for writes, which are common for vertex buffer upload, etc. Signed-off-by: Rob Clark <[email protected]>
* freedreno: don't patch and re-emit same shader as muchRob Clark2013-04-255-64/+65
| | | | | | | | New textures or vertex buffers don't always require patching and re-emitting the shaders. So do a better job of figuring out when we actually have to patch the shader. Signed-off-by: Rob Clark <[email protected]>
* draw: Yield zeros for LLVM fetches of non-existing vertex elements.José Fonseca2013-04-251-21/+28
| | | | | | | If a bug in an app/stater-tacker causes vertex buffer to fetch vertex elements that are not bound, simply return zeros instead of crashing. Reviewed-by: Brian Paul <[email protected]>
* trace: Only close trace files on exit.José Fonseca2013-04-253-18/+4
| | | | | | Many applications don't exit cleanly, others may create and destroy a screen multiple times, so we only write </trace> tag and close at exit time.
* graw: Set the vertex shader constant buffer.José Fonseca2013-04-251-1/+1
| | | | We were setting the fragment shader, which wasn't needed.
* graw: Simple utilities to dump and disassemble TGSI tokens.José Fonseca2013-04-253-0/+97
| | | | | Useful for core dumps, where calling tgsi_dump() from gdb is not an alternative.
* scons: Support clang.José Fonseca2013-04-251-1/+1
| | | | | | | | | | | clang is supports most gcc options / extensions, with a some exceptions. The biggest advantage of using clang is that compilation times are much short. One can tell scons to use clang when building by invoking it as CC=clang CXX=clang++ scons libgl-xlib
* util/u_sse: Fix _mm_shuffle_epi8 prototype for clang.José Fonseca2013-04-251-1/+6
| | | | | Clang does not support __artificial__. Instead match precisely what's in the clang headers.
* scons: Remove redundant code.José Fonseca2013-04-251-3/+0
| | | | -fvisibility=hidden is already elsewhere for the whole tree.
* freedreno: fix bogus IMM const reg indexRob Clark2013-04-242-3/+3
| | | | | | | | We were assigning incorrect const register for immediates, and potentially writing immediate const to the wrong location. This fixes an incorrect-rendering bug with xonotic. Signed-off-by: Rob Clark <[email protected]>
* freedreno: clear fixes and debuggingRob Clark2013-04-244-1/+29
| | | | | | | | Set a few extra registers to make sure we are in proper state for clearing. And also add some debug options to mark all state dirty in clear and gmem operations to aid in debugging. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix texture fetch typeRob Clark2013-04-244-2/+10
| | | | | | | There is a bit we need to set for 2D vs 3D fetch, to tell the hw whether there are two or there valid input components. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix temp register usageRob Clark2013-04-241-48/+52
| | | | | | | | | | | | | | | The previous approach of using the dst register as an intermediate temporary doesn't work in a lot of cases. For example, if the dst register is the same as one of the src registers. For now, just simplify it and always allocate a new register to use as an intermediate. In some cases this will result in more registers used than required. I think the best solution would be to implement an optimization pass to reduce the number of registers used, which would also solve the problem we have now of not being able to use GPRs that are assigned for TGSI_FILE_INPUT. Signed-off-by: Rob Clark <[email protected]>
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