| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Thomas Hellstrom <[email protected]>
Reviewed-by: Jakob Bornecrantz <[email protected]>
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Signed-off-by: Thomas Hellstrom <[email protected]>
Reviewed-by: Jakob Bornecrantz <[email protected]>
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Also fix up Makefiles to use the default mesa compilation flags.
Signed-off-by: Thomas Hellstrom <[email protected]>
Reviewed-by: Jakob Bornecrants <[email protected]>
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Also remove some unused variables in the st/xa makefile.
Signed-off-by: Thomas Hellstrom <[email protected]>
Reviewed-by: Jakob Bornecrantz <[email protected]>
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With ICS (Android 4.0), several headers and structs are renamed. Define
ANDROID_VERSION so that we can choose a different path depending on the
platform version.
I've tested only softpipe and llvmpipe. r600g is also reported to work.
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There is no buffer and android_surface_present should be a no-op when
eglSwapBuffers is called twice in a row.
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This patch fixes regression introduced in
1f3c5eae5c4be582e50c2d4d7950424d86059c45
Signed-off-by: Vasily Khoruzhick <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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This will throw a compile warning if there's an unhandled CAP.
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This will throw a compile warning if there's an unhandled CAP.
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also don't mark them as 'user', because they will be uploaded through
the translate fallback anyway.
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The motivation behind this is to add some self-documentation in the code
about how each CAP can be used.
The idea is:
- enum pipe_cap is only valid in get_param
- enum pipe_capf is only valid in get_paramf
Which CAPs are floating-point have been determined based on how everybody
except svga implemented the functions. svga have been modified to match all
the other drivers.
Besides that, the floating-point CAPs are now prefixed with PIPE_CAPF_.
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Only i965g does not enable GLSL, but that driver has been unmaintained and
bitrotting for quite a while anyway.
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They're not supported by hw directly, but it's easy to emulate
them with a shader swizzling fixup.
Signed-off-by: Vasily Khoruzhick <[email protected]>
[danvet: The important thing is to write a 1 to the unused alpha
channel, the ddx is relying on this for render accel.]
Signed-off-by: Daniel Vetter <[email protected]>
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Signed-off-by: Vadim Girlin <[email protected]>
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It's intended to indicate whether the driver/hardware supports reading
of the values written into shader outputs.
Signed-off-by: Vadim Girlin <[email protected]>
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And update r300g.
This is different from util_draw_max_index in how it obtains vertex elements
and that it doesn't have to call util_format_description due to additional
precomputed data in vertex elements.
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This forks vbo_get_minmax_index. We need to know the index range when
translating non-native vertices into native ones. There is no other way
around it.
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It will use the index buffer soon.
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The CS checker doesn't check the regs and the state-tracker-provided values
are not to be trusted.
This also removes the hack for non-zero index bias.
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It's not really useful to have non-zero there.
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Merge may produce incorrect order of operations for r600-eg:
x: inst1 R0.x, ... ; //from current group
...
t: inst0 R0.x, ... ; //from previous group, same destination
Result of inst1 will be lost.
So compare destinations and don't allow this.
Signed-off-by: Vadim Girlin <[email protected]>
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Signed-off-by: Ben Skeggs <[email protected]>
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Don't assert/die if a VBO is too small. Return zero instead. For
debug builds, emit a warning message since this is an unusual situation
that might indicate that there's a bug in the app.
Note that util_draw_max_index() now returns max_index+1 instead of
max_index. This lets us return zero to indicate that one of the VBOs
is too small to draw anything.
Fixes a failure with the new piglit vbo-too-small test.
Reviewed-by: José Fonseca <[email protected]>
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We need something that looks like a compiler and not like some hacker
put some functions together. /rant
This is a band-aid for these two problems:
- The R600 and EG control-flow instructions appear in switch statements
next to each other, causing conflicts when adding new instructions.
- The ALU control-flow instructions are bitshifted by 3 (from CF_INST 26:29
to CF_INST 23:29, as is defined by r600 ISA) even for EG, where CF_INST
is 22:29.
To fix this mess, the 'inst' field is bitshifted to the left either by 22, 23,
or 26 (directly in the definitions), such that it can be just or'd when making
bytecode without any shifting. All switch statements have been divided into
two, one for R600 and the other for EG.
Of course, there is a better way to do this, but that is left for future
work.
Tested on RV730 and REDWOOD with no regressions.
v2: minor cleanup as per Alex's comment.
Reviewed-by: Alex Deucher <[email protected]>
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Cayman is 16 as well.
Signed-off-by: Alex Deucher <[email protected]>
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According to evergreen-isa doc 16 is max value for evergreen.
More than 16 doesn't work for me.
Signed-off-by: Vadim Girlin <[email protected]>
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Reviewed-by: Brian Paul <[email protected]>
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Most of the code was alright, but we were missing a few paths.
Reviewed-by: Brian Paul <[email protected]>
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