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* gallium: Add PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLYNicolai Hähnle2016-02-0316-0/+27
* st/omx/dec/h264: fix corruption when scaling matrix present flag setLeo Liu2016-02-021-2/+5
* vl: add zig zag scan for list 4x4Leo Liu2016-02-022-0/+8
* llvmpipe: use scissor_planes_needed helper functionRoland Scheidegger2016-02-033-18/+33
* winsys/radeon: Do not deinit the pb cache if it was not initializedNiels Ole Salscheider2016-02-021-2/+3
* tgsi/scan: add tgsi_shader_info::reads_samplemaskMarek Olšák2016-02-022-0/+3
* radeonsi: rework RB+ for StoneyMarek Olšák2016-02-024-109/+228
* radeonsi: rename cb_target_mask state to cb_render_stateMarek Olšák2016-02-025-14/+15
* radeonsi: treat intensity render targets exactly like redMarek Olšák2016-02-021-1/+3
* tgsi: set correct src type for UP2HMarek Olšák2016-02-021-0/+1
* virgl: mark function as staticDave Airlie2016-02-021-1/+1
* gallivm: add PK2H/UP2H supportRoland Scheidegger2016-02-022-7/+9
* gallivm: add PK2H/UP2H supportRoland Scheidegger2016-02-025-2/+119
* tgsi: add PK2H/UP2H supportRoland Scheidegger2016-02-022-3/+48
* llvmpipe: drop scissor planes early if the tri is fully inside themRoland Scheidegger2016-02-022-69/+110
* llvmpipe: minor cleanup of sse2 for calc_fixed_positionRoland Scheidegger2016-02-021-6/+5
* llvmpipe: use vector loads for (optimized) tri raster funcsRoland Scheidegger2016-02-022-37/+24
* mesa: fix typo in python scriptsRoland Scheidegger2016-02-021-1/+1
* virgl: also build vtest for AndroidRob Herring2016-02-023-2/+35
* virgl: fix reference counting of prime handlesRob Herring2016-02-022-12/+33
* virgl: reuse screen when fd is already openRob Herring2016-02-025-8/+97
* nouveau/video: wrap assertion within #ifndef NDEBUGMauro Rossi2016-02-011-0/+2
* gallium: Add DragonFly supportFrançois Tigeot2016-01-311-1/+1
* nv50/ir: get rid of memory stores with nop valuesIlia Mirkin2016-01-301-0/+6
* nv50/ir: fix false global CSE on instructions with multiple defsIlia Mirkin2016-01-301-0/+2
* nv50,nvc0: fix buffer clearing to respect engine alignment requirementsIlia Mirkin2016-01-302-52/+247
* freedreno/ir3: ignore clip-vertex varyingRob Clark2016-01-301-1/+4
* freedreno/ir3: don't ignore local varsRob Clark2016-01-301-1/+7
* freedreno/ir3: handle tex instrs w/ const offsetRob Clark2016-01-301-0/+16
* freedreno/ir3: support load_front_face intrinsicRob Clark2016-01-301-2/+14
* freedreno: limit string marker to max packet sizeRob Clark2016-01-301-0/+3
* nvc0: avoid crashing when there are holes in vertex array bindingsIlia Mirkin2016-01-291-3/+13
* nvc0: enable atomic counters and ssboIlia Mirkin2016-01-292-2/+6
* nv50/ir: handle new TGSI MEMBAR opcodeIlia Mirkin2016-01-291-0/+8
* nvc0/ir: fix atomic compare-and-swap argumentsIlia Mirkin2016-01-293-5/+8
* nv50/ir: add support for indirect buffer loadingIlia Mirkin2016-01-292-10/+31
* nv50/ir: add SUQ op by reading the info from driver constbufIlia Mirkin2016-01-296-3/+21
* nv50/ir: add support for BUFFER accessesIlia Mirkin2016-01-296-11/+147
* nvc0: handle shader buffer memory barrierIlia Mirkin2016-01-291-0/+4
* nvc0: add state management for shader buffersIlia Mirkin2016-01-295-8/+111
* nvc0: double per-shader stage driver constants areaIlia Mirkin2016-01-293-15/+15
* trace: add support for set_shader_buffersIlia Mirkin2016-01-293-0/+60
* st/mesa: add shader buffer barrier bitIlia Mirkin2016-01-291-0/+1
* tgsi: add MEMBAR opcode to handle memoryBarrier* GLSL intrinsicsIlia Mirkin2016-01-293-2/+24
* winsys/amdgpu: Process RADEON_FLAG_* independently from RADEON_DOMAIN_*Michel Dänzer2016-01-291-10/+9
* winsys/amdgpu: Handle RADEON_FLAG_NO_CPU_ACCESSMichel Dänzer2016-01-291-0/+2
* nv50/ir: optimize mad/fma with third argument 0 to mulKarol Herbst2016-01-281-0/+21
* nv50/ir: run DCE backwardsKarol Herbst2016-01-281-3/+3
* nv50/ir: optimize shl(shr(a, c), c) to and(a, ~((1 << c) - 1))Karol Herbst2016-01-281-0/+8
* radeonsi: Add option for SI schedulerAxel Davy2016-01-283-1/+7
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