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* radeon/vcn: add decode message for mpeg4 codecLeo Liu2017-05-251-0/+51
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message for mpeg2 codecLeo Liu2017-05-251-0/+66
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message for vc1 codecLeo Liu2017-05-251-0/+72
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message for hevc codecLeo Liu2017-05-251-0/+225
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message decode for avc codecLeo Liu2017-05-251-4/+193
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message feedbackLeo Liu2017-05-251-1/+5
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message destroyLeo Liu2017-05-251-1/+10
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message createLeo Liu2017-05-251-1/+21
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add common decode partLeo Liu2017-05-253-0/+675
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/winsys: add vcn dec ring typeLeo Liu2017-05-251-0/+1
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/winsys: add uvd enc ring typeLeo Liu2017-05-251-0/+1
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add vcn decode interfaceLeo Liu2017-05-252-0/+502
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* svga: init svga_screen::swc_mutex with mtx_recursiveBrian Paul2017-05-242-1/+4
| | | | | | | | | | | | | | | | | | If the SVGA3D_BindGBSurface() call in svga_buffer_hw_storage_unmap() fails, we'll flush and that might involve unmapping other buffers. That leads to a recursive lock on svga_screen::swc_mutex and causes a deadlock. Fix this by initializing the mutex with mtx_recursive. Note that this only happened on Linux, not Windows. On Windows, the mutex functions are implemented with Win32 critical sections which support recursive locking. Also add a comment about this. Fixes VMware bug 1831549 (Unigine Tropics demo freeze on Linux). Reviewed-by: Thomas Hellstrom <[email protected]> Reviewed-by: Neha Bhende<[email protected]>
* svga: move logging initialization code into new functionBrian Paul2017-05-242-24/+31
| | | | | | Plus a few other minor clean-ups. Reviewed-by: Sinclair Yeh <[email protected]>
* svga: init local vars to silence uninitialized use warningsBrian Paul2017-05-241-3/+3
| | | | Reviewed-by: Sinclair Yeh <[email protected]>
* svga: log the process command line to the vmware.log fileBrian Paul2017-05-241-0/+16
| | | | | | | | | This is useful for Piglit when thousands of tests are run and we want to determine which test triggered a device error. v2: only log command line info if the new SVGA_EXTRA_LOGGING env var is set Reviewed-by: Charmaine Lee <[email protected]>
* svga: Limit svga message capability to newer compilersSinclair Yeh2017-05-241-4/+14
| | | | | | | | | | | The assembly code used by the SVGA message feature doesn't build properly with older compilers, so limit it to only gcc 5.3.0 and newer. Also modified the stubs to avoid "unused variable" warnings. Reviewed-by: Charmaine Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* svga: Fix MSVC build.Brian Paul2017-05-241-2/+32
| | | | | | This let us compile the code with MSVC, but it no-ops the log function. Reviewed-by: Jose Fonseca <[email protected]>
* svga: Add the ability to log messages to vmware.log on the host.Sinclair Yeh2017-05-245-0/+471
| | | | | | | | For now this capability only exists in the SVGA driver but can be exported later if other modules, e.g. winsys, wants to use it for logging. Reviewed-by: Brian Paul <[email protected]>
* Revert "gallium: remove unused PIPE_CC_GCC_VERSION"Brian Paul2017-05-241-0/+1
| | | | | | | This reverts commit e60928f4c4bd4484821d83f2b16a910ea9f5f9d9. PIPE_CC_GCC_VERSION is used by some of our in-house code which hasn't been upstreamed yet.
* winsys/amdgpu: align VA allocations to fragment size v2Christian König2017-05-241-0/+2
| | | | | | | | | | BOs larger than the minimum fragment size should have their VA alignet to at least the fragment size for optimal performance. v2: drop unused leftover from initial implementation Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* tgsi: remove unused tgsi_is_passthrough_shader()Samuel Pitoiset2017-05-242-79/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Elie Tournier <[email protected]>
* st/nine: Fix a regression and syntax cleanupAxel Davy2017-05-244-19/+16
| | | | | | | | | | | | | A few cleanups and in particular initializing properly the new pipe_draw_info fields. This should fix the regression caused by 330d0607ed60fd3edca192e54b4246310f06652f Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101088 Signed-off-by: Axel Davy <[email protected]> Tested-by: Edmondo Tommasina <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* gallium/radeon: pipe AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS into gallium HUDMarek Olšák2017-05-235-2/+16
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* freedreno/ir3: switch to NIR by defaultRob Clark2017-05-232-16/+2
| | | | | | | | | | | Now that we lower vars to regs, we no longer regress for anything that does complex dereferences. (With tgsi, derefers are already lowered before tgsi_to_nir, but not with glsl_to_nir.) In fact it actually fixes a few things to bypass tgsi. So make NIR the default (finally!) Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: lower arrays to regsRob Clark2017-05-232-150/+185
| | | | | | | | | | | Instead of using load/store_var intrinsics, which can have complex derefs in the case of multi-dimensional arrays, lower these to regs and handle the direct/indirect loads in get_src() and stores in put_dst(). This should let us switch to using nir by default. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add put_dst()Rob Clark2017-05-231-0/+24
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: code-motionRob Clark2017-05-231-55/+55
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix cmdline compilerRob Clark2017-05-231-2/+0
| | | | | | | | standalone_compiler_cleanup() frees the glsl types, among other things, so it needs to come after nir->ir3. But since we exit after dumping the disassembly, it is easier to just not call it at all. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add missing nir_opt_copy_prop_vars() passRob Clark2017-05-231-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: need different compiler options for a5xxRob Clark2017-05-234-5/+28
| | | | | | vertex_id_zero_based differs.. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: remove copapasta from a4xxRob Clark2017-05-231-2/+1
| | | | | | | Won't ever hit this w/ a420 gpu, so this is dead code. Need to get astc working to know whether to rip this out entirely or not. Signed-off-by: Rob Clark <[email protected]>
* freedreno: only support SSBOs with nirRob Clark2017-05-231-0/+3
| | | | | | | tgsi_to_nir does not support them. Note that compute shaders already force nir. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: add some missing texture formatsRob Clark2017-05-231-51/+51
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: provoking vertexRob Clark2017-05-236-44/+40
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-236-55/+64
| | | | Signed-off-by: Rob Clark <[email protected]>
* radeon: pass flags that can change shaders to disk_cache_create()Timothy Arceri2017-05-231-1/+2
| | | | | | | | | I wasn't sure if I should filter the flags so that we only use flags that actually change the shader output. To avoid manual updates we just pass in everything for now. Reviewed-by: Eduardo Lima Mitev <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* util/disk_cache: add new driver_flags param to cache keysTimothy Arceri2017-05-232-2/+2
| | | | | | | | | This will be used for things such as adding driver specific environment variables to the key. Allowing us to set environment vars that change the shader and not have the driver ignore them if it finds existing shaders in the cache. Reviewed-by: Eduardo Lima Mitev <[email protected]>
* u_format_test: Ignore S3TC errors.Jose Fonseca2017-05-221-0/+25
| | | | | | | | | | This prevents spurious failures when libtxc-dxtn-s2tc is installed. Note: lp_test_format doesn't need any change since we were already ignoring S3TC failures there. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Rhys Kidd <[email protected]>
* gallium/radeon: add a query for monitoring Gallium thread loadMarek Olšák2017-05-222-0/+13
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi/gfx9: compile shaders with +xnackMarek Olšák2017-05-221-6/+7
| | | | | | | so that LLVM doesn't allocate SGPRs where XNACK is. Cc: 17.1 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* vc4: Remove dead code in vc4_dump_surface_msaa()Rhys Kidd2017-05-221-6/+0
| | | | | | | | | Coverity caught the use of dead code copy-paste for found_colors[] and num_found_colors. CID: 1341850 Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* driconf: Add allow_glsl_builtin_variable_redeclaration optionJohn Brooks2017-05-202-0/+4
| | | | | | | | | | | | | | | This option will allow GLSL builtins to be redeclared verbatim (e.g. redeclaring "in int gl_VertexID" in a vertex shader). This is not strictly valid and would normally fail to compile, but some applications (such as newer Techland ports) do it and need more leniency. v2 (Samuel Pitoiset): - Rename allow_glsl_builtin_redeclaration -> allow_glsl_builtin_variable_redeclaration Signed-off-by: John Brooks <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nv50,nvc0: clear index buffer bufctx bin unconditionallyIlia Mirkin2017-05-202-5/+3
| | | | | | | | | The previous condition was to clear it out if it had previously been set, not what's in the current draw. That information is gone now, so just clear it unconditionally. Fixes: 330d0607e ("gallium: remove pipe_index_buffer and set_index_buffer") Signed-off-by: Ilia Mirkin <[email protected]>
* nv50: fix vtxbuf cleanupIlia Mirkin2017-05-201-1/+1
| | | | | | | Use a user-buffer-aware cleanup function. Fixes: c24c3b94ed ("gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytes") Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: SHLADD's middle source must be an immediateIlia Mirkin2017-05-201-0/+2
| | | | | | | | The instruction encodings only allow for immediates. Don't try to replace a zero (which is dumb to have in that op in any case) with RZ. Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* automake: add SWR LLVM gen_builder.hpp workaroundEmil Velikov2017-05-201-30/+11
| | | | | | | | | | | | | | | | | | | | | As gen_builder.hpp file is generated, it contains information that is specific to the LLVM version it originates from. As suggested by Tim, the file seems to be forwards compatible. So in order to produce ship a file which will work everywhere we should be using earlies supported LLVM - 3.9. With this we're back on track and can build all of mesa without python/mako/flex and friends. In the long term we might want to see if the python generators can be updated to produce LLVM version agnostic files. At least within the range supported by SWR. Cc: <[email protected]> Cc: Chuck Atkins <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* st/xvmc: add DRI3 supportEmil Velikov2017-05-191-1/+3
| | | | | Signed-off-by: Emil Velikov <[email protected]> Tested-by: Ilia Mirkin <[email protected]>
* st/omx: add DRI3 supportEmil Velikov2017-05-191-1/+3
| | | | | | Cc: Christian König <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-and-Tested-by: Leo Liu <[email protected]>
* gallium/targets: link against XCB only as neededEmil Velikov2017-05-192-4/+12
| | | | | | | | OMX and VA can optionally use the X11 DRI2/DRI3, thus we should link only as required. Cc: <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
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