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Age
Files
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*
radeonsi: Change default behaviour for undefined COLOR0
Axel Davy
2016-05-18
1
-0
/
+3
*
r600g: Change default behaviour for undefined COLOR0
Axel Davy
2016-05-18
1
-0
/
+4
*
r600: Change default behaviour for undefined COLOR0
Axel Davy
2016-05-18
1
-0
/
+4
*
svga: add another debug_printf() in svga_screen_create()
Brian Paul
2016-05-18
1
-0
/
+1
*
svga: null out all sampler views if start=num=0
Brian Paul
2016-05-17
1
-0
/
+12
*
cso: remove / add some comments
Brian Paul
2016-05-17
1
-6
/
+4
*
vc4: Add support for vertex color clamping in the rasterizer.
Eric Anholt
2016-05-17
3
-1
/
+6
*
vc4: Move tgsi_to_nir to precompile time.
Eric Anholt
2016-05-17
1
-12
/
+15
*
vc4: Mark the driver as supporting fragment color clamping in rast.
Eric Anholt
2016-05-17
1
-1
/
+1
*
vc4: Enable sharing shaders across contexts.
Eric Anholt
2016-05-17
2
-2
/
+3
*
vc4: Switch to using nir_load_front_face.
Eric Anholt
2016-05-17
2
-9
/
+18
*
vc4: Drop the dead export_linkage array.
Eric Anholt
2016-05-17
1
-5
/
+0
*
vc4: Fix a -Wformat-security warning.
Eric Anholt
2016-05-17
1
-1
/
+1
*
radeonsi: force level zero on image instructions in non-fragment shaders (v2)
Nicolai Hähnle
2016-05-17
1
-0
/
+5
*
radeonsi: emit TXQ in separate functions
Nicolai Hähnle
2016-05-17
1
-52
/
+78
*
winsys/amdgpu: cleanup error handling in amdgpu_ctx_create
Nicolai Hähnle
2016-05-17
1
-9
/
+14
*
winsys/amdgpu: avoid ioctl call when fence_wait is called without timeout
Nicolai Hähnle
2016-05-17
1
-3
/
+10
*
gallium/radeon: add radeon_emitted to check for non-trivial IBs
Nicolai Hähnle
2016-05-17
8
-16
/
+17
*
gallium/radeon: use radeon_emit_array
Nicolai Hähnle
2016-05-17
1
-2
/
+1
*
gallium/radeon: use radeon_emit
Nicolai Hähnle
2016-05-17
9
-136
/
+135
*
Treewide: Remove Elements() macro
Jan Vesely
2016-05-17
42
-149
/
+141
*
r600g,sb: Don't use standard macro name
Jan Vesely
2016-05-17
5
-11
/
+11
*
scons: gallium: link against nir as needed
Emil Velikov
2016-05-17
5
-1
/
+5
*
nvc0/ir: fix shared atomic lowering to preserve shared memory location
Ilia Mirkin
2016-05-17
1
-10
/
+8
*
freedreno/ir3: fix compiler warning
Rob Clark
2016-05-17
1
-0
/
+1
*
nvc0/ir: make sure out-of-bounds buffer loads/atomics get a 0 result
Ilia Mirkin
2016-05-17
1
-1
/
+26
*
vl/dri: Move the DRI3 check out of sources include into C.
Jose Fonseca
2016-05-16
2
-5
/
+5
*
st/vdpau: add dri3 support
Leo Liu
2016-05-16
1
-1
/
+5
*
vl/dri3: implement functions for get and set timestamp
Leo Liu
2016-05-16
1
-6
/
+53
*
vl/dri3: handle PresentCompleteNotify event
Leo Liu
2016-05-16
1
-1
/
+27
*
st/va: add dri3 support
Leo Liu
2016-05-16
1
-1
/
+5
*
vl/dri3: implement DRI3 BufferFromPixmap
Leo Liu
2016-05-16
1
-3
/
+113
*
vl/dri3: add support for resizing
Leo Liu
2016-05-16
1
-4
/
+13
*
vl/dri3: implement funciton for get dirty area
Leo Liu
2016-05-16
1
-2
/
+9
*
vl/dri3: implement function for flush frontbuffer
Leo Liu
2016-05-16
1
-2
/
+30
*
vl/dri3: add back buffers support
Leo Liu
2016-05-16
1
-2
/
+185
*
vl/dri3: implement flushing for queued events
Leo Liu
2016-05-16
1
-0
/
+36
*
vl/dri3: register present events
Leo Liu
2016-05-16
1
-0
/
+27
*
vl/dri3: set drawable geometry
Leo Liu
2016-05-16
1
-0
/
+35
*
vl/dri3: add DRI3 support and implement create and destroy
Leo Liu
2016-05-16
3
-0
/
+208
*
clover: grid_offset should be padded with 0 not 1
Jan Vesely
2016-05-16
1
-1
/
+1
*
clover: Handle PIPE_SHADER_IR_NIR in switch
Jan Vesely
2016-05-15
1
-1
/
+2
*
freedreno/ir3: small standalone compiler cleanup
Rob Clark
2016-05-15
1
-2
/
+1
*
freedreno/ir3: lower fdiv
Rob Clark
2016-05-15
1
-0
/
+1
*
freedreno/ir3: handle VARYING_SLOT_PNTC
Rob Clark
2016-05-15
1
-0
/
+12
*
freedreno/ir3: disable TGSI specific hacks in nir case
Rob Clark
2016-05-15
4
-2
/
+7
*
freedreno/ir3: add support for NIR as preferred IR
Rob Clark
2016-05-15
6
-18
/
+61
*
nv50/ir: avoid asserts when the state tracker feeds us bogus inputs
Ilia Mirkin
2016-05-15
1
-12
/
+48
*
nvc0: don't try to go through the push path for indirect draws
Ilia Mirkin
2016-05-15
1
-1
/
+2
*
nvc0/ir: make sure to align the second arg of TXD to 4, as we do for TEX
Ilia Mirkin
2016-05-15
1
-0
/
+14
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