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* meson: Revert commit overriding C++ standard with gnu++11 on ppc64elFrédéric Bonnard2020-06-301-4/+0
| | | | | | | | | | | | | Since a few versions, mesa now needs c++14 and compiling with gnu++11 on ppc64el fails. Let's use the default standard and fix the collision of types between c++ and altivec in a another patch. Cc: mesa-stable Signed-off-by: Frédéric Bonnard <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4948>
* clover: Fix types collision between c++ and altivecFrédéric Bonnard2020-06-301-0/+5
| | | | | | | | | | | For that, we undefine bool, vector, pixel as advised by altivec.h in the specific case that defines them. Cc: mesa-stable Signed-off-by: Frédéric Bonnard <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4948>
* panfrost: Do fine-grained flushing for occlusion query resultsIcecream952020-06-302-3/+9
| | | | | | | | This allows doing occlusion queries in one frame and getting the results in the next frame without having to flush. Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5676>
* freedreno/a4xx: fix *_NONE enum conversionShawn Guo2020-06-302-8/+8
| | | | | | | | | | | Commit e369b8931c67 ("freedreno: Use explicit *_NONE enum for undefined formats") only partially converts ~0 to *_NONE enum. It breaks texture support, and glmark2 texture scene gives a black screen. Adding the missing conversion of ~0 to *_NONE enum fixes the issue. Signed-off-by: Shawn Guo <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5693>
* radeonsi: add a debug option to enable NGG culling for tessellationMarek Olšák2020-06-304-8/+15
| | | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>
* radeonsi: don't try to enable NGG culling for GSMarek Olšák2020-06-301-1/+2
| | | | | | | It doesn't do anything. Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>
* radeonsi: always use Wave64 for HS/GS/VS shader stages (except GS fast launch)Marek Olšák2020-06-301-4/+8
| | | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>
* radeonsi: always use Wave32 for GS fast launch, because Wave64 hangsMarek Olšák2020-06-304-6/+19
| | | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>
* radeonsi: fix NGG culling for Wave64Marek Olšák2020-06-304-14/+23
| | | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5524>
* radeonsi: don't flush in fence_server_syncMarek Olšák2020-06-301-5/+8
| | | | | | | | | | This reverts commit 50b06cbc10dbca1dfee89b529ba9b564cc4ea6f6 and fixes an Android performance regression. Fixes: 50b06cbc10dbca1dfee89b529ba9b564cc4ea6f6 "radeonsi: fix fence_server_sync() holding up extra work v2" Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5602>
* radeonsi: bump SI_NUM_SHADER_BUFFERS to 32Pierre-Eric Pelloux-Prayer2020-06-305-35/+40
| | | | | | | | | | | | | Some app uses more than 8 SSBOs (https://gitlab.freedesktop.org/mesa/mesa/-/issues/2946), so increase SI_NUM_SHADER_BUFFERS to 32 (which allows 16 SSBOs). Since we're now using a 64 bits number to track buffers, we could bump SI_NUM_SHADER_BUFFERS to 48 but that would conflict with Mesa's MAX_COMBINED_ATOMIC_BUFFERS limit (= 90). Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2122 Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5632>
* zink: set lower_uadd_carry in nir optionsMike Blumenkrantz2020-06-291-0/+1
| | | | | | | fixes a bunch of mulextended piglit tests Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5685>
* v3d: Fix -Wmaybe-uninitialized compiler warning in the v33 code.Eric Anholt2020-06-291-2/+4
| | | | | | | | We weren't initializing the VCM bits in the !gs path, but v33 doesn't have GS so we can just mark it unreachable. Reviewed-by: Jose Maria Casanova Crespo <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2952>
* v3d: Enable PIPE_CAP_TGSI_TEXCOORD.Eric Anholt2020-06-291-0/+1
| | | | | | | | Dave wants to drop the !TEXCOORD path from NIR, and it's easy enough to do. Untested. Reviewed-by: Jose Maria Casanova Crespo <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2952>
* vc4: Enable PIPE_CAP_TGSI_TEXCOORD.Eric Anholt2020-06-293-18/+7
| | | | | | | | Dave wants to drop the !TEXCOORD path from NIR, and it's easy enough to do. Untested. Reviewed-by: Jose Maria Casanova Crespo <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2952>
* gallium/util: Add a helper function for point sprite handling.Eric Anholt2020-06-291-0/+19
| | | | | | | Many drivers will need to do the same thing here, so consolidate it. Reviewed-by: Jose Maria Casanova Crespo <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2952>
* frontends/va: Handle dynamic resolution/SVC for VP9Satyajit Sahu2020-06-292-6/+16
| | | | | | | | | | VP9 allows frame to use another resolution frame as reference frames so updating the resolution for decoder when there is a resolution change. Signed-off-by: Satyajit Sahu <[email protected]> Reviewed-by: Leo Liu <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5646>
* gallivm/nir: fix const loading on big endian systemsDave Airlie2020-06-291-1/+1
| | | | | | | | | | | | The code was expecting the lower 32-bits of the 64-bit to be what it wanted, don't be implicit, pull the value from the union. This should fix rendering on big endian systems since NIR was introduced. Fixes: 44a6b0107b37 ("gallivm: add nir->llvm translation (v2)") Reviewed-by: Timothy Arceri <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5677>
* rbug: Fix rbug_delete_vs_state lock acquisition.Vinson Lee2020-06-271-1/+1
| | | | | | | | | | | | | | Fix warning reported by Coverity Scan. Double unlock (LOCK) double_unlock: mtx_unlock unlocks rb_pipe->call_mutex while it is unlocked. Fixes: 07838ff990a7 ("rbug: Use the call mutex") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3023 Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5196>
* v3d: moving v3d simulator to src/broadcomAlejandro Piñeiro2020-06-278-1181/+5
| | | | | | | | | | | | So it could be used by both the OpenGL and the Vulkan driver. In addition to the move, some small changes were needed to be made on the API. For example, the simulator was receiving v3d_screen on initialization, and that code setted v3d_screen->sim_file. Now it returns the new sim_file created. Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5666>
* iris: Implement pipe->texture_subdata directlyKenneth Graunke2020-06-261-1/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chris Wilson noted that u_default_texture_subdata's transfer path sometimes results in wasteful double copies. This patch is based on an earlier path he wrote, but updated now that we have staging blits for busy or compressed textures. Consider the case of idle, non-CCS-compressed, tiled images: The transfer-based CPU path has to return a "linear" mapping, so upon map, it mallocs a temporary buffer. u_default_texture_subdata then copies the client memory to this malloc'd buffer, and transfer unmap performs a tiled_memcpy to copy it back into the texture. By writing a direct texture_subdata() implementation, we're able to directly do a tiled_memcpy from the client memory into the destination texture, resulting in only one copy. For linear buffers, there is no advantage to doing things directly, so we simply fall back to u_default_texture_subdata()'s transfer path to avoid replicating those cases. We still may want to use GPU staging buffers for busy destinations (to avoid stalls) or CCS-compressed images (to compress the data), at which point we also fall back to the existing path. We thought to try and use a tiled temporary, but this didn't appear to help. Improves performance in x11perf -shmput500 by 1.96x on my Icelake. Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2500 Reviewed-by: Tapani Pälli <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3818>
* freedreno/ir3: disk-cache supportRob Clark2020-06-261-0/+14
| | | | | | | | | | | | Adds a shader disk-cache for ir3 shader variants. Note that builds with `-Dshader-cache=false` have no-op stubs with `disk_cache_create()` that returns NULL. Binning pass variants are serialized together with their draw-pass counterparts, due to shared const-state. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* freedreno/ir3: build binning variant at same time as draw variantRob Clark2020-06-261-4/+8
| | | | | | | | | | | For shader-cache, we are going to want to serialize them together. Which is awkward if the two related variants are not compiled together. This also decouples allocation and compile, which will simplify adding shader-cache (which still needs to allocate, but can skip compile). Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* freedreno/a6xx+ir3: stop generating pointless binning shadersRob Clark2020-06-262-12/+8
| | | | | | | | | | | | Currently we always do sysmem if there is tess. And for GS, the binning pass VS ends up identical to the draw pass VS, so no point in compiling it twice. (For GS what we should do someday is generate a binning pass GS, and possibly if we can do cross-stage linking opts, an optimized binning pass VS, but the required outputs would somehow have to end up in the shader variant key.) Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* freedreno/ir3: add ir3_compiler_destroy()Rob Clark2020-06-261-1/+4
| | | | | | | | | Use ir3_compiler_destroy() rather than open-coding ralloc_free(). This will give us a place to add more compiler related cleanup code in the following patches. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* freedreno/ir3: move finalize_nir to pscreen hookRob Clark2020-06-266-0/+19
| | | | | Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* freedreno/ir3: add ir3_finalize_nir()Rob Clark2020-06-261-1/+1
| | | | | | | | | | | The next step is to hook this into pscreen->finalize_nir() so it can come before the state tracker's shader-caching. Unfortunately we still need to do lower_io after mesa/st, so that is split out into a post-finalize pass. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>
* zink: use OpFUnordNotEqual for nir_op_fneMike Blumenkrantz2020-06-261-1/+1
| | | | | | | we want to detect NaNs here, and OpFUnordNotEqual is the variant which does this Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: set lower_mul_high and lower_rotate in ntv compiler optionsMike Blumenkrantz2020-06-261-0/+2
| | | | | | | we don't implement these Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: handle isign alu in ntvMike Blumenkrantz2020-06-261-0/+1
| | | | | Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: handle ixor in ntvMike Blumenkrantz2020-06-261-0/+1
| | | | | | | fixes [email protected]@execution@built-in-functions@fs-op-assign-bitxor tests Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: lower byte/word extract ops in nirMike Blumenkrantz2020-06-261-0/+2
| | | | | | | we don't implement these, and pre-optimizing them breaks things in ntv->vtn Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: add bitfield_reverse handling to ntvMike Blumenkrantz2020-06-261-0/+1
| | | | | | | fixes several piglit tests Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: add ult handling for ntvMike Blumenkrantz2020-06-261-0/+1
| | | | | | | fixes shaders@glsl-vs-absolutedifference-uint piglit test Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* zink: handle signed and unsigned min/max ops in ntvMike Blumenkrantz2020-06-261-0/+4
| | | | | | | fixes a number of piglit amd_shader_trinary_minmax tests Reviewed-by: Erik Faye-Lund <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5562>
* panfrost: Add PAN_MESA_DEBUG=gl3 flagIcecream952020-06-261-5/+21
| | | | | | | | This flag allows forcing GL 3.3 without having to use MESA_GL_VERSION_OVERRIDE etc. Reviewed-by: Tomeu Vizoso <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5584>
* freedreno/a6xx: use firstIndex fieldConnor Abbott2020-06-261-3/+2
| | | | | | Analogous to the turnip change. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>
* freedreno: On a5xx+ INDX_SIZE is MAX_INDICESConnor Abbott2020-06-263-14/+14
| | | | | | | | | This was already done correctly for the indirect variants, and turnip was setting the correct value, but it seems freedreno missed the change in the non-indirect variant. Also, fix a misspelling of "indices" and add a type to INDX_SIZE. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5644>
* freedreno: Share constlen between different stages properlyConnor Abbott2020-06-262-8/+42
| | | | Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
* freedreno: Refactor ir3_cache shader compilationConnor Abbott2020-06-261-22/+29
| | | | | | | Use an array, which makes it more like turnip and makes implementing the const limits easier. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
* ir3, freedreno: Round up constlen earlierConnor Abbott2020-06-265-10/+12
| | | | | | | Prevents problems when calculating whether we overflow the shared limit. Note that on a6xx, the macros handle the assert for us. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5607>
* radeonsi: remove tabsMarek Olšák2020-06-269-56/+56
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
* radeonsi: clear per-context buffers at the end of si_create_contextMarek Olšák2020-06-261-5/+11
| | | | | | | We don't want any packets before CONTEXT_CONTROL. Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
* radeonsi: make si_pm4_cmd_begin/end static and simplify all usagesMarek Olšák2020-06-264-15/+8
| | | | | | | There is no longer the confusing trailing si_pm4_cmd_end call. Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
* radeonsi: disallow adding BOs into si_pm4_state except 1 shader BO per stateMarek Olšák2020-06-264-36/+4
| | | | | | | | The si_shader pointer is already there, so use it and remove the array of BOs. Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
* radeonsi: make wait_mem_scratch unmappableMarek Olšák2020-06-261-1/+4
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
* radeonsi: don't add the tess ring buffers into the cs_preamble stateMarek Olšák2020-06-262-3/+5
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
* radeonsi: rename init_config states to cs_preamble statesMarek Olšák2020-06-267-47/+45
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
* radeonsi: don't add the border color buffer into the init_config stateMarek Olšák2020-06-262-1/+3
| | | | | | | We might have to replace init_config for preemption. Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
* ac,winsys/amdgpu: align IBs the same as the kernelMarek Olšák2020-06-261-11/+16
| | | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-24 11:49:12 +0000