aboutsummaryrefslogtreecommitdiffstats
path: root/src/gallium
Commit message (Expand)AuthorAgeFilesLines
...
* r600/llvm: remove dead code for LLVM 3.3Marek Olšák2015-09-101-106/+0
* r600g: use pipe_resource::width0 instead pb_buffer::sizeMarek Olšák2015-09-102-6/+6
* radeonsi: enable VGPR spilling on VIMarek Olšák2015-09-101-3/+1
* winsys/amdgpu: calculate the maximum number of compute unitsMarek Olšák2015-09-101-2/+13
* clover: Avoid using typename to allow compilation of clover by clangAlbert Freeman2015-09-101-1/+1
* nv50/ir: don't fold immediate into mad if registers are too highIlia Mirkin2015-09-101-0/+4
* nv50/ir: fix emission of 8-byte wide interp instructionIlia Mirkin2015-09-101-5/+6
* nv50/ir: r63 is only 0 if we are using less than 63 registersIlia Mirkin2015-09-101-1/+4
* nv50/ir: make edge splitting fix up phi node sourcesIlia Mirkin2015-09-101-13/+77
* nvc0: remove BGRA4 format supportIlia Mirkin2015-09-091-0/+2
* gallium/ttn: fix cursor handling vs builderRob Clark2015-09-091-8/+6
* nvc0: keep track of cb bindings per buffer, use for upload settingsIlia Mirkin2015-09-097-12/+58
* nv30: Disable msaa unless requested from the env by NV30_MAX_MSAAHans de Goede2015-09-092-1/+21
* nv30: Fix color resolving for nv3x cardsHans de Goede2015-09-091-1/+37
* gallium/docs: clairify dmabuf fd ownershipRob Clark2015-09-091-0/+8
* android: radeonsi: add support for sid_tables.h generated sourcesMauro Rossi2015-09-093-3/+15
* nouveau: android: add space before PRIx64 macroMauro Rossi2015-09-091-1/+1
* svga: pick all the files into the tarballEmil Velikov2015-09-091-5/+26
* auxiliary: rework the python generated sources rulesEmil Velikov2015-09-091-12/+17
* r600: don't use shader key without verifying shader type (v2)Dave Airlie2015-09-091-7/+12
* nvc0: always emit a full shader colormaskIlia Mirkin2015-09-081-1/+1
* nv30: Fix max width / height checks in nv30 sifm codeHans de Goede2015-09-071-2/+2
* svga: Fix surface view error handlingThomas Hellstrom2015-09-071-22/+26
* xa: add xa_surface_from_handle2 v2Rob Clark2015-09-073-11/+45
* nouveau: don't mark full range as used on unmap with explicit flushIlia Mirkin2015-09-051-5/+7
* nv50: avoid using inline vertex data submit when gl_VertexID is usedIlia Mirkin2015-09-054-2/+14
* nv50: don't flush vertex arrays when index buffer changesIlia Mirkin2015-09-051-4/+0
* nv50: rebind bo to bufctx when invalidating idxbuf storageIlia Mirkin2015-09-051-1/+5
* nv50: clear buffer status on all vertex bufs, not just the first oneIlia Mirkin2015-09-051-1/+0
* nv50: fix drawing from tfb, direct-to-pushbuf submitsIlia Mirkin2015-09-054-14/+15
* llvmpipe: convert double to long long instead of unsigned long longOded Gabbay2015-09-041-1/+1
* nv30: Implement color resolve for msaaHans de Goede2015-09-042-14/+8
* nv30: Fix creation of scanout buffersHans de Goede2015-09-041-0/+10
* vc4: Initialize pack field of qreg to 0 in qir_get_tempBoyan Ding2015-09-041-0/+1
* r600: fix loop overrun in cayman_mul_double_instrDave Airlie2015-09-041-1/+1
* svga: update call to u_upload_alloc()Brian Paul2015-09-031-3/+3
* winsys/radeon: remove exported buffers from the cacheMarek Olšák2015-09-031-0/+3
* winsys/amdgpu: remove exported buffers from the cacheMarek Olšák2015-09-031-0/+3
* gallium/pb_bufmgr_cache: add a way to remove buffers from the cache explicitlyMarek Olšák2015-09-032-6/+41
* u_upload_mgr: remove the return value from u_upload_dataMarek Olšák2015-09-033-22/+18
* u_upload_mgr: remove the return value from u_upload_bufferMarek Olšák2015-09-032-31/+18
* u_upload_mgr: remove the return value from u_upload_alloc_bufferMarek Olšák2015-09-031-11/+9
* u_upload_mgr: remove the return value from u_upload_allocMarek Olšák2015-09-033-34/+34
* u_upload_mgr: optimize u_upload_allocMarek Olšák2015-09-031-15/+17
* gallium/radeon: remove 'dirty' member from r600_atomGrazvydas Ignotas2015-09-034-6/+1
* r600g: simplify dirty atom trackingGrazvydas Ignotas2015-09-033-49/+14
* r600g: start numbering atoms from 1Grazvydas Ignotas2015-09-033-3/+3
* r600g: make all viewport states use single atomGrazvydas Ignotas2015-09-036-34/+38
* r600g: apply disable workaround on all scissorsGrazvydas Ignotas2015-09-032-9/+14
* r600g: make all scissor states use single atomGrazvydas Ignotas2015-09-036-40/+62