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* configure: replace pkg-config calls with $(PKG_CONFIG) in the makefiles.Stéphane Marchesin2011-10-0426-36/+36
| | | | | | | Us poor souls who cross compile mesa want to be able to specify which pkg-config to pick, or at least just change one place. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* st/glx: Set the drawable attribute on xmesa_buffer creation.Stephen White2011-10-041-1/+1
| | | | Otherwise we'll be unable to use our pbuffers.
* r300g: fix rendering with a non-zero index bias in draw_elements_immediateMarek Olšák2011-10-041-1/+3
| | | | NOTE: This is a candidate for the stable branches.
* r600g: fix parsing TGSI declarationsMarek Olšák2011-10-041-2/+2
| | | | It was a lucky coincidence that it worked.
* r300/compiler: Fix error in OMOD optimizationTom Stellard2011-10-021-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | Classic compiler mistake. In the example below, the OMOD optimization was combining instructions 4 and 10, but since there was an instruction (#8) in between them that wrote to the same registers as instruction 10, instruction 11 was reading the wrong value. Example of the mistake: Before OMOD: 4: MAD temp[0].y, temp[3]._y__, const[0]._x__, const[0]._y__; ... 8: ADD temp[2].x, temp[1].x___, -temp[4].x___; ... 10: MUL temp[2].x, const[1].y___, temp[0].y___; 11: FRC temp[5].x, temp[2].x___; After OMOD: 4: MAD temp[2].x / 8, temp[3]._y__, const[0]._x__, const[0]._y__; ... 8: ADD temp[2].x, temp[1].x___, -temp[4].x___; ... 11: FRC temp[5].x, temp[2].x___; https://bugs.freedesktop.org/show_bug.cgi?id=41367
* r300/compiler: Rewrite source swizzles when using OMODTom Stellard2011-10-021-1/+6
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* r300/compiler: Fix rc_normal_rewrite_writemask()Tom Stellard2011-10-021-5/+4
| | | | This function had not been updated to use conversion swizzles.
* r300/compiler: Use consistent src swizzles for transcendent instructionsTom Stellard2011-10-025-6/+33
| | | | | | | | | | | | | | | Source swizzles for transcendent instructions were being stored in the X channel regardless of what channel the instruction was writing. This was causing problems for some helper functions that were expecting source swizzles to occupy channels corresponding to the instruction's writemask. This commit makes transcendent instructions follow the same convention as normal instructions for representing source swizzles. Previous behavior: LG2 temp[0].y, input[0].x___; Current behavior: LG2 temp[0].y, input[0]._x__;
* r600g: fix a compiler warningMarek Olšák2011-09-301-0/+1
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* gallium/docs: update the documentation of capabilitiesMarek Olšák2011-09-301-73/+84
| | | | Still like 13 caps are undocumented.
* r600g: move all files from winsys/r600 into drivers/r600Marek Olšák2011-09-3019-91/+11
| | | | | | Be sure to reconfigure after this commit. Reviewed-by: Alex Deucher <[email protected]>
* winsys/radeon: move GEM domains out of the drivers into winsysMarek Olšák2011-09-3015-111/+82
| | | | | | | | | | | | | | | The drivers don't need to care about the domains. All they need to set are the bind and usage flags. This simplifies the winsys too. This also fixes on r600g: - fbo-depth-GL_DEPTH_COMPONENT32F-copypixels - fbo-depth-GL_DEPTH_COMPONENT16-copypixels - fbo-depth-GL_DEPTH_COMPONENT24-copypixels - fbo-depth-GL_DEPTH_COMPONENT32-copypixels - fbo-depth-GL_DEPTH24_STENCIL8-copypixels I can't explain it. Reviewed-by: Alex Deucher <[email protected]>
* winsys/radeon: remove a redundant parameter 'size' from buffer_from_handleMarek Olšák2011-09-304-10/+5
| | | | | | It's part of pb_buffer already. Reviewed-by: Alex Deucher <[email protected]>
* r600g: remove struct radeon (or what's left of it)Marek Olšák2011-09-308-96/+18
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: move family and chip_class from struct radeon to r600_screenMarek Olšák2011-09-308-70/+57
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: merge r600_bo with r600_resourceMarek Olšák2011-09-3018-382/+243
| | | | | | | I have moved 'last_flush' and 'binding' from r600_bo to winsys/radeon. The other members are now part of r600_resource. Reviewed-by: Alex Deucher <[email protected]>
* gallium: add PIPE_CAP_TEXTURE_BARRIERMarek Olšák2011-09-305-1/+6
| | | | | | Same issue as with conditional_render. Reviewed-by: Brian Paul <[email protected]>
* gallium: add PIPE_CAP_CONDITIONAL_RENDERMarek Olšák2011-09-307-2/+9
| | | | | | | We were checking whether render_condition is set. That was not reliable, because it's always set with trace and noop regardless of driver support. Reviewed-by: Brian Paul <[email protected]>
* gallium: add and use PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERSMarek Olšák2011-09-3014-54/+60
| | | | | | | | | This removes: - PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS - PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS in favor of the that new per-shader cap. Reviewed-by: Brian Paul <[email protected]>
* gallium: remove PIPE_CAP_TEXTURE_MIRROR_REPEATMarek Olšák2011-09-3011-17/+0
| | | | | | | | | | All drivers support it (well, except Cell). The boolean option is going away from core Mesa too. This is a follow-up to Ian Romanick's patch "mesa: Remove ARB_texture_mirrored_repeat extension enable flag". Reviewed-by: Brian Paul <[email protected]>
* xorg/vmwgfx: Kill this target. It's not used anymore.Thomas Hellstrom2011-09-3013-2783/+0
| | | | | | | | | | | This fixes a build error introduced with commit "winsys/svga: Update to vmwgfx kernel module 2.1" if both the svga driver and the xorg state tracker was enabled at the same time. If needed we can re-add a minimal target for basic functionality. Signed-off-by: Thomas Hellstrom <[email protected]>
* winsys/svga: Update to vmwgfx kernel module 2.1Thomas Hellstrom2011-09-2911-263/+668
| | | | | | | | | Introduces fence objecs and a size limit on query buffers. The possibility to map the fifo from user-space is gone, and replaced by an ioctl that reads the 3D capabilities. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Jakob Bornecranz <[email protected]>
* st/xa: Don't call fence_reference with an unitialized fence handle as dstThomas Hellstrom2011-09-291-1/+1
| | | | Signed-off-by: Thomas Hellstrom <[email protected]>
* st/xa: surfaces and sampler views are per contextThomas Hellstrom2011-09-295-63/+65
| | | | | | | | Don't store references to these on the surface but on the context. References to transfers are still stored on the surface since we allow only a single map of a surface at a time. Signed-off-by: Thomas Hellstrom <[email protected]>
* llvmpipe: Convert some of the null checks back to asserts.José Fonseca2011-09-291-26/+12
| | | | | | This turns some of the null check warnings in commit 023ca40d80670ac0eee8c755ca5f54b1e7c2712e back to asserts, as the underlying cause of fdo bug 40591 should be fixed now.
* llvmpipe: Also reset the state in lp_scene_bin_resetJosé Fonseca2011-09-291-0/+1
| | | | Prevents segfaults when a opaque tile is found without state change.
* llvmpipe: Prevent segfault during fs variant cache shrinking.José Fonseca2011-09-291-4/+15
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* tools/trace: Dump NULL literally.José Fonseca2011-09-291-0/+4
| | | | Instead of None.
* winsys/radeon: remove redundant member radeon_bo::sizeMarek Olšák2011-09-293-8/+5
| | | | It's part of pb_buffer already.
* winsys/radeon: simplify updating GEM domains for relocationsMarek Olšák2011-09-291-10/+2
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* winsys/radeon: simplify passing GEM domains through to GEM_CREATEMarek Olšák2011-09-292-25/+13
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* r300g: remove useless variables in some structuresMarek Olšák2011-09-294-29/+12
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* r300g: simplify the immd_is_good_idea functionMarek Olšák2011-09-291-26/+2
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* r600g: convert if (query->type) into switch statementsMarek Olšák2011-09-291-26/+54
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* gallium/docs: update d3d11ddi.txtMarek Olšák2011-09-291-22/+11
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* d3d1x: propagate DepthBiasClamp to rasterizer csoChristoph Bumiller2011-09-281-2/+1
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* d3d1x: fix uninitialized const color union blackChristoph Bumiller2011-09-281-1/+1
| | | | Broken by 6dd284f7c8fac22f64c13fdf9909094f5ec59086.
* nv50,nvc0: support polygon offset clamp stateChristoph Bumiller2011-09-286-3/+9
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* r600: support polygon offset clamp stateChristoph Bumiller2011-09-282-2/+2
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* gallium: add polygon offset clamp stateChristoph Bumiller2011-09-285-0/+11
| | | | This is required for D3D1x and supported by hardware.
* gallium: move border color to be a color unionDave Airlie2011-09-2718-42/+43
| | | | | | | | | | EXT_texture_integer also specifies border color should be a color union, the values are used according to the texture sampler format. (update docs) Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* r600g: add index_bias to index buffer boundsMarek Olšák2011-09-261-0/+5
| | | | | | This fixes ARB_draw_elements_base_vertex with max_index != ~0. NOTE: This is a candidate for the 7.11 branch.
* u_vbuf_mgr: fix uploading with a non-zero index biasMarek Olšák2011-09-261-4/+11
| | | | | | Also don't rely on pipe_draw_info being set correctly. NOTE: This is a candidate for the 7.11 branch.
* u_vbuf_mgr: dereference some pointers only once etc.Marek Olšák2011-09-261-10/+13
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* u_vbuf_mgr: rework user buffer uploadsMarek Olšák2011-09-261-36/+58
| | | | | | | | | | | - first determine the buffer range to upload for each buffer by walking over vertex elements - take buffer_offset into account - take src_offset into account - take src_format into account in more places - don't just blindly upload (stride*count) bytes NOTE: This is a candidate for the 7.11 branch.
* u_vbuf_mgr: remove unused flag U_VBUF_UPLOAD_FLUSHEDMarek Olšák2011-09-262-21/+6
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* u_vbuf_mgr: s/u_vbuf_mgr_/u_vbuf_Marek Olšák2011-09-269-82/+81
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* u_vbuf_mgr: fix max_index computation for large src_offsetMarek Olšák2011-09-261-8/+8
| | | | NOTE: This is a candidate for the 7.11 branch.
* u_vbuf_mgr: don't take per-instance attribs into acc. when computing max indexMarek Olšák2011-09-261-1/+2
| | | | NOTE: This is a candidate for the 7.11 branch.
* u_vbuf_mgr: cleanup original vs real vertex buffer arraysMarek Olšák2011-09-265-47/+45
| | | | | | It can now override both buffer offsets and strides in additions to resources. Overriding buffer offsets was kinda hackish and could cause issues with non-native vertex formats.