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* svga: fix incompatible bind flags at buffer validation timeCharmaine Lee2018-05-161-2/+7
| | | | | | | | | | | | At buffer resource validation time, if the resource handle is not yet created and if the initial buffer bind flags and the tobind flags are incompatible, just use the tobind flags to create the resource handle. On the other hand, if the bind flags are compatible, we can combine the bind flags for the resource handle creation. Fixes piglit gl-3.1-buffer-bindings crash. Reviewed-by: Brian Paul <[email protected]>
* etnaviv: Fix missing rnndb file in tarballsStuart Young2018-05-162-0/+2
| | | | | | | | | | | | | | | Seems that when the rnndb files for etniviv were updated/included back in Nov 2017, hw/texdesc_3d.xml.h was missed from Makefile.sources and meson.build. This was all during the conversion to meson, so it apears to have slipped through the cracks. As such, this file has been missing from the official tarballs since inclusion in Mesa, so the git trees and tarballs differ. Found due to lintian errors in the Debian packages. Fixes: f1e1c60ff6 ("etnaviv: Update from rnndb") Cc: [email protected] Reviewed-by: Christian Gmeiner <[email protected]>
* gallium/hud: add frametime graph (v2)Matthias Groß2018-05-153-1/+38
| | | | | | | | | Thanks for your comment. This version has an additional boolean in the fps_info struct to distinguish between fps and frame time calculation. The struct is initialised in the respecting install functions for this purpose. Signed-off-by: Marek Olšák <[email protected]>
* eg/compute: Use reference counting to handle compute memory pool.Jan Vesely2018-05-152-12/+7
| | | | | | | | | | | | | Use pipe_reference to release old RAT surfaces. RAT surface adds a reference to pool bo, so use reference counting for pool->bo as well. v2: Use the same pattern for both defrag paths Drop confusing comment CC: <[email protected]> Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* gallivm: Use alloca_undef with array type instead of alloca_arrayRoland Scheidegger2018-05-161-28/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use a single allocation of array type instead of the old-style array allocation for the temp and immediate arrays. Probably only makes a difference if they aren't used indirectly (so, if we used them solely because there's too many temps or immediates). In this case the sroa and early-cse passes can sometimes do some optimizations which they otherwise cannot. (As a side note, for the temp reg array, we actually really should use one allocation per array id, not just one for everything.) Note that the instcombine pass would actually promote such allocations to single alloc of array type as well, but it's too late for some artificial shaders we've seen to help (we don't want to run instcombine at the beginning due to its cost, hence would need another sroa/cse pass after instcombine). sroa/early-cse help there because they can actually eliminate all of the huge shader, reducing it to a single const output (don't ask...). (Interestingly, instcombine also removes all the bitcasts we do on that allocation for single-value gathering, and in the end directly indexes into the single vector elements, which according to spec is only semi-valid, but this happens regardless. Another thing instcombine also does is use inbound GEPs, which is probably something we should do manually as well - for indirectly indexed reg files llvm may not be able to figure it out on its own, but we should be able to guarantee all pointers are always inbound. In any case, by the looks of it using single allocation with array type seems to be the right thing to do even for ordinary shaders.) No piglit change. Reviewed-by: Jose Fonseca <[email protected]>
* cso: check count == 0 in cso_set_vertex_buffersMarek Olšák2018-05-151-0/+3
| | | | | | | | The code didn't expect that, leading to crashes. Fixes: 86d63b53a20a747e "gallium: remove aux_vertex_buffer_slot code" Tested-by: Michel Dänzer <[email protected]>
* vc5: use util_copy_framebuffer_stateRob Clark2018-05-151-12/+2
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* vc4: use util_copy_framebuffer_stateRob Clark2018-05-151-12/+2
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno/a5xx: remove fd5_shader_stateobjRob Clark2018-05-153-23/+10
| | | | | | Extra level of indirection that serves no purpose. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a4xx: remove fd4_shader_stateobjRob Clark2018-05-153-23/+10
| | | | | | Extra level of indirection that serves no purpose. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: remove fd3_shader_stateobjRob Clark2018-05-153-26/+13
| | | | | | Extra level of indirection that serves no purpose. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fence should hold a ref to pipeRob Clark2018-05-151-3/+4
| | | | | | | | | | | | | | | | | | | | | | | Since the fence can outlive the context, and all it really needs to wait on a fence is the pipe, use the new fd_pipe reference counting to hold a ref to the pipe and drop the ctx pointer. This fixes a crash seen with (for example) glmark2: #0 fd_pipe_wait_timeout (pipe=0xbf48678b3cd7b32b, timestamp=0, timeout=18446744073709551615) at freedreno_pipe.c:101 #1 0x0000ffffbdf75914 in fd_fence_finish (pscreen=0x561110, ctx=0x0, fence=0xc55c10, timeout=18446744073709551615) at ../src/gallium/drivers/freedreno/freedreno_fence.c:96 #2 0x0000ffffbde154e4 in dri_flush (cPriv=0xb1ff80, dPriv=0x556660, flags=3, reason=__DRI2_THROTTLE_SWAPBUFFER) at ../src/gallium/state_trackers/dri/dri_drawable.c:569 #3 0x0000ffffbecd8b44 in loader_dri3_flush (draw=0x558a28, flags=3, throttle_reason=__DRI2_THROTTLE_SWAPBUFFER) at ../src/loader/loader_dri3_helper.c:656 #4 0x0000ffffbecbc36c in glx_dri3_flush_drawable (draw=0x558a28, flags=3) at ../src/glx/dri3_glx.c:132 #5 0x0000ffffbecd91e8 in loader_dri3_swap_buffers_msc (draw=0x558a28, target_msc=0, divisor=0, remainder=0, flush_flags=3, force_copy=false) at ../src/loader/loader_dri3_helper.c:827 #6 0x0000ffffbecbcfc4 in dri3_swap_buffers (pdraw=0x5589f0, target_msc=0, divisor=0, remainder=0, flush=1) at ../src/glx/dri3_glx.c:587 #7 0x0000ffffbec98218 in glXSwapBuffers (dpy=0x502bb0, drawable=2097154) at ../src/glx/glxcmds.c:840 #8 0x000000000040994c in CanvasGeneric::update (this=0xfffffffff400) at ../src/canvas-generic.cpp:114 #9 0x0000000000411594 in MainLoop::step (this=this@entry=0x5728f0) at ../src/main-loop.cpp:108 #10 0x0000000000409498 in do_benchmark (canvas=...) at ../src/main.cpp:117 #11 0x00000000004071b0 in main (argc=<optimized out>, argv=<optimized out>) at ../src/main.cpp:210 Signed-off-by: Rob Clark <[email protected]>
* freedreno: batch cache doesn't hold a ref to batchRob Clark2018-05-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The cache doesn't hold a (strong) reference to the batch. So we shouldn't be trying to drop a reference, as that leads to: #0 0x0000ffffbecb37a0 in raise () from /lib64/libc.so.6 #1 0x0000ffffbeca159c in abort () from /lib64/libc.so.6 #2 0x0000ffffbecacf48 in __assert_fail_base () from /lib64/libc.so.6 #3 0x0000ffffbecacfa8 in __assert_fail () from /lib64/libc.so.6 #4 0x0000ffffbd28def0 in pipe_reference_described (ptr=0x4f47130, reference=0x0, get_desc=0xffffbd2e0f08 <__fd_batch_describe>) at ../src/gallium/auxiliary/util/u_inlines.h:88 #5 0x0000ffffbd28e188 in fd_batch_reference_locked (ptr=0x4f40de0, batch=0x0) at ../src/gallium/drivers/freedreno/freedreno_batch.h:258 #6 0x0000ffffbd28e9a8 in fd_bc_invalidate_resource (rsc=0x4f40ca0, destroy=true) at ../src/gallium/drivers/freedreno/freedreno_batch_cache.c:244 #7 0x0000ffffbd293778 in fd_resource_destroy (pscreen=0xedc170, prsc=0x4f40ca0) at ../src/gallium/drivers/freedreno/freedreno_resource.c:644 #8 0x0000ffffbd922674 in u_transfer_helper_resource_destroy (pscreen=0xedc170, prsc=0x4f40ca0) at ../src/gallium/auxiliary/util/u_transfer_helper.c:144 #9 0x0000ffffbd29527c in pipe_resource_reference (ptr=0x4f455d8, tex=0x0) at ../src/gallium/auxiliary/util/u_inlines.h:144 #10 0x0000ffffbd29548c in fd_surface_destroy (pctx=0x1012720, psurf=0x4f455d0) at ../src/gallium/drivers/freedreno/freedreno_surface.c:78 #11 0x0000ffffbd1f9c48 in pipe_surface_reference (ptr=0x4f471d0, surf=0x0) at ../src/gallium/auxiliary/util/u_inlines.h:113 #12 0x0000ffffbd1f9ef4 in util_copy_framebuffer_state (dst=0x4f471c8, src=0x0) at ../src/gallium/auxiliary/util/u_framebuffer.c:114 #13 0x0000ffffbd2e0e30 in __fd_batch_destroy (batch=0x4f47130) at ../src/gallium/drivers/freedreno/freedreno_batch.c:225 #14 0x0000ffffbd28e1b0 in fd_batch_reference_locked (ptr=0xfffffffff010, batch=0x0) at ../src/gallium/drivers/freedreno/freedreno_batch.h:262 #15 0x0000ffffbd28e6b0 in fd_bc_invalidate_context (ctx=0x1012720) at ../src/gallium/drivers/freedreno/freedreno_batch_cache.c:190 #16 0x0000ffffbd2e2b6c in fd_context_destroy (pctx=0x1012720) at ../src/gallium/drivers/freedreno/freedreno_context.c:139 #17 0x0000ffffbd2c3280 in fd5_context_destroy (pctx=0x1012720) at ../src/gallium/drivers/freedreno/a5xx/fd5_context.c:56 #18 0x0000ffffbd5b7a8c in st_destroy_context_priv (st=0xfd72f0, destroy_pipe=true) at ../src/mesa/state_tracker/st_context.c:281 Signed-off-by: Rob Clark <[email protected]>
* meson: fix copyright symbolEric Engestrom2018-05-151-1/+1
| | | | | Fixes: bd68f1013cea8742390c "autotools, meson: add tileset.h" Signed-off-by: Eric Engestrom <[email protected]>
* autotools, meson: add tileset.hJuan A. Suarez Romero2018-05-152-1/+3
| | | | | Fixes: 4e52cb51b5 ("swr/rast: Thread locked tiles improvement") Reviewed-by: Eric Engestrom <[email protected]>
* st/xa: Bump minorThomas Hellstrom2018-05-151-1/+1
| | | | | | | | | | | | | Bump xa minor to signal that the underlying mesa version is suitable for dri3. This is a bit ugly since it doesn't relate to a specific xa interface change. Recently there has been a number of fixes in mesa that helps enabling dri3 without any significant regressions in automated testing and common desktop usage latency. However, the xf86-video-vmware driver has no other way to tell but inspecting the xa version. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* virgl: enable vertex streams when glsl level is high enough.Dave Airlie2018-05-152-2/+3
| | | | | This enabled the vertex streams out when the host supports GL4.0.
* opencl: autotools: Fix linking order for OpenCL targetKai Wasserbäch2018-05-141-2/+1
| | | | | | | | | | | | | Otherwise the build fails with an undefined reference to clang::FrontendTimesIsEnabled. Bugzilla: https://bugs.freedesktop.org/106209 Cc: Jan Vesely <[email protected]> Cc: [email protected] Signed-off-by: Kai Wasserbäch <[email protected]> Acked-by: Jan Vesely <[email protected]> Tested-by: Aaron Watry <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* llvmpipe: Fix random number generation for unit testsRoland Scheidegger2018-05-142-2/+19
| | | | | | | | | | | | | | | | | | | | | | | We were never producing negative numbers for signed types. Also fix only producing half the valid range for uint32, and properly clamp signed values. Because this now also properly tests snorm with actually negative values, need to increase eps for such conversions. I believe these cannot actually be hit in ordinary operation (e.g. if a snorm texture is sampled and output to snorm RT, it will still go through snorm->float and float->snorm conversion), so don't bother to do anything to fix the bad accuracy (might be quite complex). Basically, the issue is for something like snorm16->snorm8 that in the end this will just use a 8 bit arithmetic right shift. But the math behind it says we should actually do a division by 32767 / 127, which is ~258, not 256. So the result can be one bit off (values have too large magnitude), and furthermore, the shift has incorrect rounding (always rounds down). For positive numbers, these errors have different direction, but for negative ones they have the same, hence for some values the error will be 2 bit in the end. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=106232
* nvc0: fix setting of subpixel precision during conservative rasterizationRhys Perry2018-05-132-2/+2
| | | | | | Fixes: 07dac3e040 ("nvc0: add conservative rasterization support") Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: remove aux_vertex_buffer_slot codeMarek Olšák2018-05-126-67/+38
| | | | | | The slot index is always 0, and is pretty unlikely to change in the future. Reviewed-by: Brian Paul <[email protected]>
* radeon/vce: add firmware support for ver 53 and upBoyuan Zhang2018-05-111-2/+2
| | | | | | | All vce firmwares with major version greater than or equal to 53 are supported Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* etnaviv: remove pipe_fence_handle::ctxRob Clark2018-05-111-2/+0
| | | | | | | | | A fence can outlive the ctx it was created from (see glmark2).. etnaviv doesn't actually need fence->ctx so lets remove it before someone makes the mistake of assuming it is a valid pointer. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* swr/rast: Thread locked tiles improvementGeorge Kyriazis2018-05-117-24/+152
| | | | | | | - Change tilemgr TILE_ID encoding to use Morton-order (Z-order). - Change locked tiles set to bitset. Makes clear, set, get much faster. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add Builder::GetVectorType()George Kyriazis2018-05-112-0/+45
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Prepend the console output with a newlineGeorge Kyriazis2018-05-111-1/+1
| | | | | | It can get jumbled with output from other threads. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add ConcatLists()George Kyriazis2018-05-111-0/+6
| | | | | | for concatenating lists Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add constant initializer for uint64_tGeorge Kyriazis2018-05-112-0/+6
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Use binner topology to assemble backend attributesGeorge Kyriazis2018-05-111-1/+1
| | | | | | | | Previously was using the draw topology, which may change if GS or Tess are active. Only affected attributes marked with constant interpolation, which limited the impact. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Change formattingGeorge Kyriazis2018-05-111-1/+6
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* winsys/amdgpu: Destroy dev_hash table when the last winsys is removed.Jan Vesely2018-05-101-1/+6
| | | | | | | | Fixes memory leak on module unload. CC: <[email protected]> Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/gpu_info: add has_read_registers_queryMarek Olšák2018-05-102-3/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add has_2d_tilingMarek Olšák2018-05-102-5/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add has_sparse_vm_mappingsMarek Olšák2018-05-102-11/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add has_unaligned_shader_loadsMarek Olšák2018-05-102-5/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: expose ARB_query_buffer_object on ancient kernels tooMarek Olšák2018-05-101-3/+1
| | | | | | It doesn't use indirect dispatches. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add has_indirect_compute_dispatchMarek Olšák2018-05-102-13/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add kernel_flushes_tc_l2_after_ibMarek Olšák2018-05-102-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add has_format_bc1_through_bc7Marek Olšák2018-05-102-6/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add has_eqaa_surface_allocatorMarek Olšák2018-05-102-1/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: clean up the reset status query implementationMarek Olšák2018-05-103-23/+20
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add has_bo_metadataMarek Olšák2018-05-102-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add si_TA_CS_BC_BASE_ADDR_allowedMarek Olšák2018-05-102-3/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add htile_cmask_support_1d_tilingMarek Olšák2018-05-103-9/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/gpu_info: add kernel_flushes_hdp_before_ibMarek Olšák2018-05-102-4/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add an environment variable that forces EQAA for MSAA allocationsMarek Olšák2018-05-104-5/+59
| | | | | | This is for testing and experiments. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set up EQAA image descriptors properlyMarek Olšák2018-05-101-16/+80
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add EQAA SC,DB,CB register programmingMarek Olšák2018-05-102-8/+71
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: support creating EQAA color texturesMarek Olšák2018-05-103-17/+33
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: add EQAA supportMarek Olšák2018-05-105-8/+13
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
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