| Commit message (Collapse) | Author | Age | Files | Lines |
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Conflicts:
configs/linux-dri
configure.ac
src/gallium/drivers/nvfx/Makefile
src/gallium/include/pipe/p_defines.h
src/gallium/include/pipe/p_screen.h
src/gallium/include/state_tracker/dri1_api.h
src/gallium/include/state_tracker/drm_api.h
src/gallium/tests/python/samples/tri.py
src/gallium/tests/trivial/Makefile
src/gallium/tests/unit/Makefile
src/gallium/tests/unit/SConscript
src/gallium/tests/unit/u_format_test.c
src/gallium/winsys/nouveau/drm/nouveau_drm_api.c
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we weren't decreasing when removing from the list.
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if we know the bo has gone not busy, no need to add another bo wait
thanks to Andre (taiu) on irc for pointing this out.
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since we plan on using dx10 constant buffers everywhere.
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we don't use this since constant buffers are now being used on all gpus.
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When we go to do a lot of bos in one draw like constant bufs we need
to avoid bouncing off the busy ioctl, this mitigates by backing off
on busy bos for a short amount of times.
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If we assume busy buffers are added to the list in order its unlikely
we'd fine one after the first busy one that isn't busy.
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this just keeps a list of bos submitted together, and uses them to decide
bo busy state for the whole group.
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These texture formats (like R16G16B16A16_UNORM) were untested until now
because st/mesa doesn't use them. I am testing this with a hacked st/mesa
here.
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Signed-off-by: Jerome Glisse <[email protected]>
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Signed-off-by: Jerome Glisse <[email protected]>
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Signed-off-by: Jerome Glisse <[email protected]>
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Add bo offset everywhere needed if r600_bo is ever a sub bo
of a bigger bo.
Signed-off-by: Jerome Glisse <[email protected]>
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Signed-off-by: Jerome Glisse <[email protected]>
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From AROS.
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no wonder it was slow, the code is deliberately forcing stuff into GTT,
we used to have domain management but it seems to have disappeared.
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this code was memcmp'ing two structs, but refcounting one of them afterwards,
so any subsequent memcmp was never going to work.
again this stops unnecessary uploads of vertex program,
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this function was taking quite a lot of pointless CPU.
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Blending with DST_ALPHA is undefined. SRC_ALPHA works, though.
I bet some other formats have similar limitations too.
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The hw swizzles have been obtained by a brute force approach,
and only C0 and C2 are stored in UV88, the other channels are
ignored.
R16G16 is going to be a lot trickier.
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Fixes this GCC warning.
r600_shader.c: In function 'tgsi_split_literal_constant':
r600_shader.c:818: warning: unused variable 'index'
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Signed-off-by: Nicolas Kaiser <[email protected]>
Signed-off-by: Brian Paul <[email protected]>
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Signed-off-by: Jerome Glisse <[email protected]>
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this sets up a single loop constant like r600c does.
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just a typo in the register headers.
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this gets rid of lots of the instability on evergreen,
which isn't surprising since it really broken not to flush caches.
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there are some vertex formats defined in r600c not in the docs.
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this shouldn't change behaviour, just push the choice of what
to do out to the shader.
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fixes segfault in depth-tex-modes-glsl and OA startup.
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we'll need this for color tiling on evergreen.
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none of the EG cards need the quirk.
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These need to be emitted, we also need them to do proper vtx start,
instead of abusing index offset.
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although evergreen can apparantly sample direct from 24-bit,
just make it work with the current method for now.
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http://bugs.freedesktop.org/show_bug.cgi?id=30516
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Save a lot of call into the kernel and thus improve performances.
Signed-off-by: Jerome Glisse <[email protected]>
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This avoid to overcount the number of dwords we need and
thus avoid maximazation of cs buffer use.
Signed-off-by: Jerome Glisse <[email protected]
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Signed-off-by: Jerome Glisse <[email protected]>
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This reverts commit 5f66b340aa49c6bc8d0acb2d1a6f8e9a7ef2cb2e, quickly
fixing 30514.
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Signed-off-by: Jerome Glisse <[email protected]>
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Really old gcc's (3.3, at least) don't have support for the
intrinsics we need. This implements a fallback for that case.
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Signed-off-by: Jerome Glisse <[email protected]>
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