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* nv50: rename 3d binding points to NV50_BIND_3D_XXXSamuel Pitoiset2016-03-198-46/+46
* nv50: rename 3d dirty flags to NV50_NEW_3D_XXXSamuel Pitoiset2016-03-198-112/+112
* nv50: rename NV50_COMPUTE to NV50_CPSamuel Pitoiset2016-03-193-52/+52
* nv50: rename nv50_context::dirty to nv50_context::dirty_3dSamuel Pitoiset2016-03-198-57/+57
* tgsi: add tgsi_transform_op3_inst() functionBrian Paul2016-03-181-0/+34
* gallium/swr: Cleaned up some context-resource managementGeorge Kyriazis2016-03-175-26/+27
* radeonsi: fix Hyper-Z hangs on P2 configsMarek Olšák2016-03-171-2/+8
* r300g: add missing layer argument to rws->buffer_get_handle() callBrian Paul2016-03-171-1/+1
* radeon/winsys: add layer support for BO exportChristian König2016-03-174-0/+7
* radeon/winsys: add offset support for BO import/exportChristian König2016-03-175-18/+33
* gallium/winsys/drm: add layer to struct winsys_handleChristian König2016-03-171-0/+5
* gallium/winsys/drm: add offset to struct winsys_handleChristian König2016-03-176-0/+13
* nir: add a bit_size parameter to nir_ssa_dest_initConnor Abbott2016-03-176-15/+15
* nir: rename nir_const_value fields to include bitsize informationIago Toral Quiroga2016-03-174-14/+14
* nir: update opcode definitions for different bit sizesConnor Abbott2016-03-171-1/+3
* vc4: Move discard handling to the condition flag.Eric Anholt2016-03-165-34/+29
* vc4: Don't make a temporary for setting flags.Eric Anholt2016-03-161-1/+2
* vc4: Add a safety check for setting flags.Eric Anholt2016-03-161-0/+3
* vc4: Reuse list_for_each_entry_safe_rev().Eric Anholt2016-03-161-6/+2
* vc4: Coalesce instructions using VPM reads into the VPM read.Varad Gautam2016-03-153-7/+71
* vc4: rename file to group vpm optimizations togetherVarad Gautam2016-03-152-2/+2
* vc4: Fix failures with nir_extract_* since the addition of the opcodes.Eric Anholt2016-03-151-0/+2
* llvmpipe: fix lp_rast_plane alignment on 32bitRoland Scheidegger2016-03-152-0/+8
* draw: fix line stipplingRoland Scheidegger2016-03-151-15/+15
* softpipe: fix misleading TGSI_QUAD_SIZE usageRoland Scheidegger2016-03-151-24/+29
* softpipe: fix anisotropic filtering crashRoland Scheidegger2016-03-151-2/+7
* radeonsi: set DEPTH_BEFORE_SHADER based on FS_EARLY_DEPTH_STENCILNicolai Hähnle2016-03-141-0/+3
* tgsi: add tgsi_full_src_register_from_dst helper functionNicolai Hähnle2016-03-142-0/+20
* gallium/u_inlines: add util_copy_image_viewNicolai Hähnle2016-03-141-0/+10
* gallium: add access field to pipe_image_viewNicolai Hähnle2016-03-142-1/+10
* tgsi: add TGSI_PROPERTY_FS_EARLY_DEPTH_STENCILNicolai Hähnle2016-03-143-1/+9
* st/glsl_to_tgsi: provide Texture and Format information for image opsNicolai Hähnle2016-03-142-5/+15
* tgsi: add Texture and Format to tgsi_instruction_memoryNicolai Hähnle2016-03-142-1/+11
* clover: Fix pipe_grid_info.indirect not being initialized.Hans de Goede2016-03-141-1/+1
* gallium/swr: Resource managementBruce Cherniak2016-03-1410-143/+265
* nv50,nvc0: Set only NEW_CP_GLOBALS upon bindingPierre Moreau2016-03-132-2/+2
* freedreno/ir3: lower extract_byte/wordRob Clark2016-03-131-0/+2
* nv50,nvc0: handle SQRT lowering inside the driverIlia Mirkin2016-03-136-23/+27
* nv50/ir: avoid folding mul + add if the mul has a dnzIlia Mirkin2016-03-131-3/+2
* nvc0: fix blit triangle size to fully cover FB's > 8192x8192Ilia Mirkin2016-03-131-4/+4
* freedreno: OUT_RELOC vs OUT_RELOCW fixesRob Clark2016-03-133-7/+7
* freedreno/a4xx: hw binningRob Clark2016-03-134-33/+210
* freedreno/a4xx: use generated headers for draw initiatorRob Clark2016-03-131-3/+4
* freedreno/a4xx: remove RB_RENDER_CONTROL patchingRob Clark2016-03-136-41/+8
* freedreno: update generated headersRob Clark2016-03-135-11/+32
* freedreno/a3xx: move where we deal w/ binning FSRob Clark2016-03-133-10/+10
* freedreno/a4xx: move where we deal w/ binning FSRob Clark2016-03-133-10/+10
* freedreno/a3xx: constify the shader variantsRob Clark2016-03-132-6/+6
* freedreno/a4xx: constify the shader variantsRob Clark2016-03-134-13/+13
* freedreno/a3xx: remove duplicate mark of end of binning cmdsRob Clark2016-03-131-3/+0
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