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* clover: Add support for compiling to native object code v3Tom Stellard2014-10-162-9/+204
| | | | | | | | | | | v2: - Split build_module_native() into three separate functions. - Code cleanups. v3: - More cleanups. Reviewed-by: Francisco Jerez <[email protected]>
* gallium: Add PIPE_SHADER_IR_NATIVE to enum pipe_shader_irTom Stellard2014-10-162-3/+4
| | | | | | | Drivers can return this value for PIPE_COMPUTE_CAP_IR_TARGET if they want clover to give them native object code. Reviewed-by: Francisco Jerez <[email protected]>
* clover: Factor kernel argument parsing into its own function v2Tom Stellard2014-10-161-81/+92
| | | | | | | v2: - Code cleanups. Reviewed-by: Francisco Jerez <[email protected]>
* vc4: correctly include the source filesEmil Velikov2014-10-162-3/+1
| | | | | | | | | The kernel files are built into a separate static library and all the functions that require it are already wrapped in ifdef USE_VC4_SIMULATOR. Don't forget the header file :) Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno/ir3: large const supportRob Clark2014-10-155-13/+33
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2014-10-154-5/+10
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: fix layer_strideRob Clark2014-10-151-1/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: inline fd_draw_emit()Rob Clark2014-10-152-49/+47
| | | | | | Manual LTO Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: optimize shader key comparisionRob Clark2014-10-155-40/+79
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: refactor/optimize emitRob Clark2014-10-157-83/+125
| | | | | | | | | | | | | Because we reuse various bits of emit code (for state/vertex/prog/etc) for both regular draws and internal draws (gmem<->mem, clear, etc), the number of parameters getting passed around has been growing. Refactor to group these into fd3_emit. This simplifies fxn signatures, avoids passing around shader key on the stack, etc. It also gives us a nice place to cache shader-variant lookup to avoid looking up shader variants multiple times per draw (without having to *also* pass them around as fxn args everywhere). Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: refactor vertex state emitRob Clark2014-10-1511-79/+83
| | | | | | | | | | | | | | Get rid of fd3_vertex_buf and use fd_vertex_state directly for all draws. Removes a tiny bit of CPU overhead for munging around the vertex state every time it is emitted, but more importantly it cleans things up for later optimizations, so the emit paths don't have to special case internal draws (gmem<->mem, clears, etc) with regular draws. Instead of constructing fd3_vertex_buf array each time for internal draws, and context init time pre-create solid_vbuf_state and blit_vbuf_state. Signed-off-by: Rob Clark <[email protected]>
* vc4: Fix the uniform debug output.Eric Anholt2014-10-151-1/+1
| | | | | I dropped the shader index when moving to the compiled shader struct, but didn't update the format string here.
* vc4: Add support for user clip plane and gl_ClipVertex.Eric Anholt2014-10-155-4/+91
| | | | Fixes about 15 piglit tests about interpolation and clipping.
* vc4: Move the output semantics setup to a helper.Eric Anholt2014-10-151-16/+28
| | | | I want to reuse it elsewhere to set up outputs that aren't in the TGSI.
* r600g,radeonsi: Only set use_staging_texture = TRUE onceMichel Dänzer2014-10-151-8/+5
| | | | | | No need to check for setting the flag after we set it already. Reviewed-by: Marek Olšák <[email protected]>
* r600g,radeonsi: Use staging texture for transfers if any miplevel is tiledMichel Dänzer2014-10-151-1/+1
| | | | | | | We set the NO_CPU_ACCESS flag for BO allocation in that case, so direct CPU access may not work. Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: Use separate caching buffer manager for each set of flagsMichel Dänzer2014-10-153-41/+32
| | | | | | | | Otherwise the caching buffer manager may return a buffer which was created with a different set of flags, which can cause trouble. Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]>
* clover: Fix regression in module serializationTom Stellard2014-10-141-0/+1
| | | | | | | We need to serialize semantic information for arguments, which was added in 06139c56fa070f84a931a4ddbdb894c9e8d24f55. Reviewed-by: Francisco Jerez <[email protected]>
* st/gbm: fix order of arguments passed to is_format_supportedIlia Mirkin2014-10-141-1/+1
| | | | | | | | Reported by Coverity Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Cc: [email protected]
* freedreno: use tgsi_loweringRob Clark2014-10-148-1673/+6
| | | | | | | Now that the freedreno_lowering code is moved to tgsi_lowering, remove our private copy and switch over to using the common version. Signed-off-by: Rob Clark <[email protected]>
* r300/compiler: remove useless checkDavid Heidelberger2014-10-141-5/+2
| | | | | | | | This code is already in if (!variable->C->is_r500) so no need check twice. Reviewed-by: Tom Stellard <[email protected]> Signed-off-by: David Heidelberger <[email protected]>
* ilo: Build pipe-loader for iloNick Sarnie2014-10-142-0/+40
| | | | | | | Trivial patch to create the pipe loader for ilo. All the code was already there. Signed-off-by: Nick Sarnie <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* automake: explicitly set TARGET_RADEON_{WINSYS,COMMON}Emil Velikov2014-10-143-5/+5
| | | | | | | | | | Originally the variables were set only once via the ?= operator but that causes issues when doing incremental builds. They appear to be undefined and missing from the dependency list despite their addition to LIBADD. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84807 Signed-off-by: Emil Velikov <[email protected]>
* vc4: Fix render target NPOT alignment at small miplevels.Eric Anholt2014-10-141-3/+12
| | | | | | | | The texturing hardware takes the POT level 0 width/height and minifies those. This is different from what we were doing, for example, for 273-wide's level 5: POT(273>>5) == 8, while POT(273)>>5 == 16. Fixes piglit-depthstencil-render-miplevels 273.
* vc4: Add support for having 0 vertex elements used.Eric Anholt2014-10-142-6/+47
| | | | | You have to load at least 1, according to the simulator. Fixes 4 piglit tests and even more ES2 conformance tests.
* auxilary/os: Add DragonFly BSD support in os_get_total_physical_memory.Vinson Lee2014-10-131-0/+2
| | | | | | | | | | | This patch fixes this build error on DragonFly BSD. CC os/os_misc.lo os/os_misc.c: In function 'os_get_total_physical_memory': os/os_misc.c:132:2: error: #error Unsupported *BSD Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* ilo: clear writer pointer after unmappingChia-I Wu2014-10-141-0/+1
| | | | | | | It does not look like an issue now but it is good to be future proof. Spotted by Courtney Goeltzenleuchter. Signed-off-by: Chia-I Wu <[email protected]>
* vc4: Write the VPM read setup multiple times to queue all the inputs.Eric Anholt2014-10-131-3/+18
| | | | | | | There's a 4-element fifo, and the size (number of dwords per vertex) field is just 4 bits. Fixes glsl-routing on sim.
* vc4: Add support for the TXL opcode.Eric Anholt2014-10-131-5/+15
| | | | | | There's a bit at the bottom of cube map stride (which has some formatting bugs in the docs) which flips the bias coordinate to being an absolute LOD.
* vc4: Improve the accuracy of SIN and COS.Eric Anholt2014-10-131-11/+17
| | | | | | | | | This gets them to pass glsl-sin/cos. There was an obvious problem that I was using the FRC code on the scaled input value, which means that we had a range in [0, 1], while our taylor is most accurate across [-0.5, 0.5]. We can just slide things over, but that means flipping the sign of the coefficients. After that, it was just a matter of stuffing more coefficients in.
* vc4: Match VS outputs to FS inputs.Eric Anholt2014-10-133-18/+135
| | | | | | | | | If the VS doesn't output a value that the FS needs, we still need to read the right contents for the remaining FS inputs, by emitting padding. And if the VS outputs something the FS doesn't need, we shouldn't put it in the VPM at all (so the code producing it can get DCEed). Fixes 77 piglit tests.
* vc4: Add support for the CEIL opcode.Eric Anholt2014-10-131-0/+22
| | | | Not as big of a deal as SSG, but still +9 piglit tests.
* vc4: Add support for the SSG opcode.Eric Anholt2014-10-131-0/+12
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* r600g: Implement GL_ARB_sample_shadingGlenn Kennard2014-10-1210-119/+383
| | | | | | | | Also fixes two sided lighting which was broken at least on pre-evergreen by commit b1eb00. Signed-off-by: Glenn Kennard <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: use tgsi_shader_info in si_llvm_emit_fs_epilogueMarek Olšák2014-10-121-71/+61
| | | | | | | | | This is the last use tgsi_parse_token in radeonsi. It looks ugly because the code was re-indented, but there is really no change in behavior. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove si_shader_output_values::indexMarek Olšák2014-10-121-17/+6
| | | | | | | | It's redundant now. It led to a simplification in si_llvm_emit_streamout, because outidx == reg. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info in si_llvm_emit_vs_epilogueMarek Olšák2014-10-121-26/+13
| | | | | | That code was really ugly. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove shader->input[] and output[] arrays and dependenciesMarek Olšák2014-10-123-89/+2
| | | | | | | | | They were reinventing tgsi_shader_info. They are unused now. radeon_llvm_context::load_input can be NULL if input fetching is implemented in some other way. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: move param_offset out of shader->input[] and output[]Marek Olšák2014-10-123-7/+10
| | | | | | Those are going away. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info to get a list of GS outputsMarek Olšák2014-10-122-14/+12
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info in si_update_spi_mapMarek Olšák2014-10-121-9/+13
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: simplify dereferences in si_update_spi_mapMarek Olšák2014-10-121-2/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info in si_shader_vsMarek Olšák2014-10-121-2/+3
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info in si_shader_psMarek Olšák2014-10-123-5/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info in fetch_input_gsMarek Olšák2014-10-121-4/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't rely on shader->output in si_llvm_emit_fs_epilogueMarek Olšák2014-10-121-1/+1
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use tgsi_shader_info in si_llvm_emit_es_epilogueMarek Olšák2014-10-121-17/+5
| | | | | | tgsi_shader_info contains everything we need. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: don't recompile shaders when changing nr_cbufs from 0 to 1Marek Olšák2014-10-123-4/+4
| | | | | | Both cases are equivalent. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove vs.ucps_enabled from the shader keyMarek Olšák2014-10-123-15/+0
| | | | | | Written CLIPDIST outputs are simply disabled in PA_CL_VS_OUT_CNTL. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: assume ClipDistance usage mask is always 0xfMarek Olšák2014-10-122-8/+2
| | | | | | | | | | | | No code in Mesa sets the usage mask to any other value. The final mask is AND'ed with enable bits from the rasterizer state anyway. If somebody implements setting usage masks in st/mesa, we can use tgsi_shader_info to get it more easily. This is a prerequisite for the following commit. Reviewed-by: Michel Dänzer <[email protected]>
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