| Commit message (Collapse) | Author | Age | Files | Lines |
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with these I can drop the force int type hack.
Signed-off-by: Dave Airlie <[email protected]>
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as per Brian's suggestion, drop the pointless loops.
Signed-off-by: Dave Airlie <[email protected]>
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Not 100% sure these are correct yet
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Will get to adding r600/r700/cayman support, have it mostly written on
another PC.
Signed-off-by: Dave Airlie <[email protected]>
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Should fix https://bugs.freedesktop.org/show_bug.cgi?id=41613
We don't want to create these vertex elements unless the pipe driver
vertex stage can handle integers.
Signed-off-by: Dave Airlie <[email protected]>
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They were already implemented, but not advertised.
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They spam console, but are not very useful - hide them behind
NOUVEAU_MESA_DEBUG environment variable.
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Relocations don't consume pushbuffer space, so there is no need to
ensure there is any space in pushbuffer.
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If there is not enough space in pushbuffer for fence emission
(nouveau_fence_emit -> nv50_screen_fence_emit -> MARK_RING),
the pushbuffer is flushed, which through flush_notify ->
nv50_default_flush_notify -> nouveau_fence_update marks currently
emitting fence as flushed. But actual emission is done after this mark.
So later when there is a need to wait on this fence and pushbuffer
was not flushed in between, fence wait will never finish causing
application to hang.
To fix this, introduce new fence state between AVAILABLE and EMITTED,
set it before emission and handle it everywhere.
Additionally obtain fence sequence numbers after possible flush in
MARK_RING, because we want to emit fences in correct order.
Reviewed-by: Christoph Bumiller <[email protected]>
Note: This is a candidate for the 7.11 branch.
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adds handling for int texture/vertices to evergreen.
TODO r600/700 support.
Signed-off-by: Dave Airlie <[email protected]>
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We need add a new set of fragment shader variants, along with new vertex
elements for signed and unsigned clears.
The new fragment shader variants are due to the integers values requiring
CONSTANT interpolation. The new vertex element descriptions are for passing
the clear color as an unsigned or signed integer value.
Signed-off-by: Dave Airlie <[email protected]>
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NOTE: This is a candidate for the stable branches.
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This add support for unsigned/signed integer types via adding a 'pure' bit
in the format description table. It adds 4 new u_format get/put hooks,
for get/put uint and get/put sint so that accessors can get native access
to the integer bits. This is used to avoid precision loss via float converting
paths.
It doesn't add any float fetchers for these types at the moment, GL doesn't
require float fetching from these types and I expect we'll introduce a lot
of hidden bugs if we start allowing such conversions without an API mandating
it.
It adds all formats from EXT_texture_integer and EXT_texture_rg.
0 regressions on llvmpipe here with this.
(there is some more follow on code in my gallium-int-work branch, bringing
softpipe and mesa to a pretty integer clean state)
v2: fixup python generator to get signed->unsigned and unsigned->signed
fetches working.
Signed-off-by: Dave Airlie <[email protected]>
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This is used in a few places in drivers as well, also the integer support
can use it as well.
Signed-off-by: Dave Airlie <[email protected]>
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Unimplemented and not so useful for this driver.
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Signed-off-by: Daniel Vetter <[email protected]>
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... with the right value.
Signed-off-by: Daniel Vetter <[email protected]>
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Do it in two passes in that case.
v2: Don't forget to handle stencil clears.
Signed-off-by: Daniel Vetter <[email protected]>
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Docs say this is obeyed.
Signed-off-by: Daniel Vetter <[email protected]>
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4bit palette ftw!
Signed-off-by: Daniel Vetter <[email protected]>
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Docs say that default shader input color input need to be spec
as ARGB8888. And a clear rect prim essentially uses this value
instead of default diffuse. Depth on the other hands is an ieee
32 bit float. Clear stencil is U8.
Completely different are the clear values for zone init prims.
These are speced in the actual output pixel layout (and need
to be repeated for 16 bit formats).
Clear up the confusion by adding some comments.
v2: Retain the target swizzling support added by Stephan Marchesin.
Signed-off-by: Daniel Vetter <[email protected]>
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This way it can be reused in the fastclear path.
Signed-off-by: Daniel Vetter <[email protected]>
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We leave the debug code in place to troubleshoot issues while we complete the transition. That code might be removed after that.
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We still need to investigate LIS7 though.
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If you want to access it, you should use the Drawable in xlib_drawable instead.
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The previous change was not effective for lines, because there is no
4 planes 4x4 block rasterization path: it is handled by the 16x16 block
case too, and the 16x16 block was not being budged as it should.
This fixes assertion failures on line rasterization.
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the tile.
llvmpipe has a few special rasterization paths for triangles contained in
16x16 blocks, but it allows the 16x16 block to be aligned only to a 4x4
grid.
Some 16x16 blocks could actually intersect the tile
if the triangle is 16 pixels in one dimension but 4 in the other, causing
a buffer overflow.
The fix consists of budging the 16x16 blocks back inside the tile.
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We want quad/pixel Z values to be interpolated exactly the same for
multi-pass algorithms. Because of how the optimized Z-test code is
written, we can't cull the first quad in a run even if it's totally
killed. See the comment for more info.
NOTE: This is a candidate for the 7.11 branch.
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We only want to generate the fragment shader variant that does
stippling if DO_PSTIPPLE_IN_HELPER_MODULE is being used.
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Us poor souls who cross compile mesa want to be able to specify which pkg-config to pick, or at least just change one place.
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
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Otherwise we'll be unable to use our pbuffers.
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NOTE: This is a candidate for the stable branches.
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It was a lucky coincidence that it worked.
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Classic compiler mistake. In the example below, the OMOD optimization
was combining instructions 4 and 10, but since there was an instruction
(#8) in between them that wrote to the same registers as instruction 10,
instruction 11 was reading the wrong value.
Example of the mistake:
Before OMOD:
4: MAD temp[0].y, temp[3]._y__, const[0]._x__, const[0]._y__;
...
8: ADD temp[2].x, temp[1].x___, -temp[4].x___;
...
10: MUL temp[2].x, const[1].y___, temp[0].y___;
11: FRC temp[5].x, temp[2].x___;
After OMOD:
4: MAD temp[2].x / 8, temp[3]._y__, const[0]._x__, const[0]._y__;
...
8: ADD temp[2].x, temp[1].x___, -temp[4].x___;
...
11: FRC temp[5].x, temp[2].x___;
https://bugs.freedesktop.org/show_bug.cgi?id=41367
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