summaryrefslogtreecommitdiffstats
path: root/src/gallium
Commit message (Collapse)AuthorAgeFilesLines
* freedreno/ir3: more builder helpersRob Clark2015-06-214-21/+16
| | | | | | | | Use ir3_MOV() builder in a couple of spots, rather than open-coding the instruction construction. Also add ir3_NOP() builder and use that instead of open coding. Signed-off-by: Rob Clark <[email protected]>
* gallium/ttn: add missing SNERob Clark2015-06-211-0/+1
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* gallium/ttn: add texture-type supportRob Clark2015-06-211-1/+43
| | | | | | | | v2: rebased on using SVIEW to hold type information Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* util/blitter (and friends): generate appropriate SVIEW declsRob Clark2015-06-216-47/+146
| | | | | | | | Some hardware needs to know the sampler type. Update the blit related shaders to include SVIEW decl. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* util/pstipple: updates for SVIEW declsRob Clark2015-06-211-5/+17
| | | | | | | | | | To allow for shaders which use SVIEW decls for TEX* instructions, we need to preserve the constraint that the shader either has no SVIEW's or it has one matching SVIEW for each SAMP. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* draw: updates to support SVIEW declsRob Clark2015-06-212-2/+32
| | | | | | | | | | To allow for shaders which use SVIEW decls for TEX* instructions, we need to preserve the constraint that the shader either has no SVIEW's or it has one matching SVIEW for each SAMP. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* tgsi/transform: add support for SVIEW declsRob Clark2015-06-211-0/+21
| | | | | | | | | | TODO single return_type (use enum) v2: single return_type arg, and use enum Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* tgsi: update docs for SVIEW usage with TEX* instructionsRob Clark2015-06-211-0/+12
| | | | | | | | | | Based on mailing list discussion here: http://lists.freedesktop.org/archives/mesa-dev/2014-November/071583.html Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* vc4: Use a defined t value for 1D textures.Eric Anholt2015-06-201-1/+3
| | | | | This doesn't fix the broken 1D cases of texsubimage, but it does prevent segfaulting when dumping the QIR code generated in fbo-1d.
* vc4: Fix write-only texsubimage when we had to align.Eric Anholt2015-06-201-1/+5
| | | | | | | | We need to make sure that when we store the aligned box, we've got initialized contents in the border. We could potentially just load the border area, but for now let's get text rendering working in X (and fix the GL_TEXTURE_2D errors in piglit's texsubimage test and gl-2.1-pbo/test_tex_image)
* ilo: clean up header includesChia-I Wu2015-06-205-2/+5
| | | | Core is more self-contained now.
* ilo: avoid ilo_ib_state in genX_3DPRIMITIVE()Chia-I Wu2015-06-202-10/+8
| | | | ilo_ib_state is not in core.
* ilo: move gen6_so_SURFACE_STATE() out of coreChia-I Wu2015-06-202-52/+53
| | | | It does not belong to core.
* ilo: add ilo_state_sol_bufferChia-I Wu2015-06-206-103/+317
| | | | It serves the same purpose as ilo_state_vertex_buffer does.
* ilo: add ilo_state_index_bufferChia-I Wu2015-06-207-70/+171
| | | | It serves the same purpose as ilo_state_vertex_buffer does.
* ilo: add ilo_state_vertex_bufferChia-I Wu2015-06-207-54/+189
| | | | | | Being a parameter-like state, we may want to get rid of ilo_state_vertex_buffer_info or ilo_state_vertex_buffer eventually. But we want them now as they are how we do cross-validation right now.
* ilo: add 3DSTATE_VF_INSTANCING to ilo_state_vfChia-I Wu2015-06-209-67/+168
| | | | | | 3DSTATE_VF_INSTANCING specifies instancing enable and step rate. They are specified along with 3DSTATE_VERTEX_BUFFERS instead prior to Gen8. Both commands are added.
* ilo: add 3DSTATE_VF to ilo_state_vfChia-I Wu2015-06-209-66/+190
| | | | | | 3DSTATE_VF specifies cut index enable and cut index. Cut index enable is specified in 3DSTATE_INDEX_BUFFER instead prior to Gen7.5. Both commands are added.
* ilo: embed pipe_index_buffer in ilo_ib_stateChia-I Wu2015-06-203-45/+40
| | | | Make it obvious that we save a copy of pipe_index_buffer.
* ilo: fix a buffer overrunChia-I Wu2015-06-201-1/+1
| | | | Add missing parentheses in SURFTYPE_NULL initialization.
* ilo: fix a -Wmaybe-uninitialized warningChia-I Wu2015-06-201-0/+1
| | | | | | ilo_shader.c: In function ‘ilo_shader_select_kernel_sbe’: ilo_shader.c:1140:27: warning: ‘src_skip’ may be used uninitialized in this function [-Wmaybe-uninitialized]
* u_vbuf: fix src_offset alignment in u_vbuf_create_vertex_elements()Brian Paul2015-06-191-1/+2
| | | | | | | | | | | | | | If the driver says PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY=1, the driver should never receive a pipe_vertex_element::src_offset value that's not a multiple of four. But the vbuf code wasn't actually adjusting the src_offset value when creating the vertex element state object. We just need to align the src_offset values put in the driver_attribs[] array. See the piglit gl-1.5-vertex-buffer-offsets test. Reviewed-by: Marek Olšák <[email protected]>
* gallium: whitespace, formatting clean-up in p_state.hBrian Paul2015-06-191-16/+20
| | | | | Remove trailing whitespace, move some braces, 78-column wrapping. Trivial.
* st/wgl: fix WGL_SWAP_METHOD_ARB queryBrian Paul2015-06-191-1/+6
| | | | | | | | | | There are three possible return values (not two): WGL_SWAP_COPY_ARB, WGL_SWAP_EXCHANGE_EXT and WGL_SWAP_UNDEFINED_ARB. VMware bug 1431184 Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* stw: use new stw_get_nop_function() function to avoid Viewperf 12 crashesBrian Paul2015-06-191-3/+20
| | | | | | | Also, print a warning if we do return NULL from wglGetProcAddress() to help spot this sort of problem in the future. Reviewed-by: José Fonseca <[email protected]>
* stw: add some no-op functions for GL_EXT_dsa, GL_NV_half_floatBrian Paul2015-06-193-0/+476
| | | | | | | | | | | | | | | | | | Viewperf 12 calls wglGetProcAddress() to get pointers to some unsupported DSA and half-float functions. We return NULL but Viewperf doesn't check for null before trying to jump through the pointer. That causes a crash. This patch adds no-op functions to call instead (used by the next patch). This avoids the crash but the rendering is incorrect. Some DSA functions are being added to Mesa at this time so we may be able to remove some of these no-ops in the future. More no-op functions may be added as needed. VMware PR1383421 Reviewed-by: José Fonseca <[email protected]>
* st/wgl: Don't return core profile for 3.1 contexts.Jose Fonseca2015-06-191-7/+6
| | | | | | | | | | | | | | | | | | | WGL_CONTEXT_PROFILE_MASK_ARB doesn't apply to desktop OpenGL versions less than 3.2 -- applications can't specify whether they want a core or a compat 3.1 context -- instead they are supposed the check whether the returned context advertises GL_ARB_compatibility extension. Mesa doesn't support compatability contexts for version higher than 3.1, so we used to return core profile context, but this makes several Windows applications unhappy, because they just assume they got a compatability context without checking. So it seems safer to on Windows to never return core profile for 3.1, ie, just fail the context creation. VMware PR1365920. Reviewed-by: Brian Paul <[email protected]>
* st/wgl: set PIPE_BIND_SAMPLER_VIEW for window color buffersBrian Paul2015-06-191-0/+1
| | | | | | | To allow sampling from the surface for things like glCopyPixels or glCopyTexSubImage. Reviewed-by: Charmaine Lee <[email protected]>
* st/wgl: add support for multisample pixel formatsBrian Paul2015-06-191-9/+20
| | | | | | | | | Create pixel formats with 0, 4, 8 and 16 samples per pixel. Add a SVGA_FORCE_MSAA env var to force creating all pixel formats with a particular sample count. This is useful for testing Mesa/GLUT/ etc. programs which don't ordinarily use multisample. Reviewed-by: Matthew McClure <[email protected]>
* st/wgl: respect sample count when creating framebuffer surfacesBrian Paul2015-06-191-0/+1
| | | | | | Use the visual/pixel format's sample count instead of zero. Reviewed-by: Matthew McClure <[email protected]>
* st/wgl: fix WGL_SAMPLE_BUFFERS_ARB queryBrian Paul2015-06-191-1/+1
| | | | | | | Only report 1 for WGL_SAMPLE_BUFFERS_ARB if the number of samples per pixel > 1. Reviewed-by: Matthew McClure <[email protected]>
* tgsi: add comments for ureg_emit_label()Brian Paul2015-06-191-0/+6
|
* tgsi: new comments, assertion for executing TGSI_OPCODE_CALBrian Paul2015-06-191-1/+5
|
* llvmpipe: Truncate the binned constants to max const buffer size.Jose Fonseca2015-06-192-2/+9
| | | | | | | | | Tested with Ilia Mirkin's gzdoom.trace and "arb_uniform_buffer_object-maxuniformblocksize fsexceed" piglit test without my earlier fix to fail linkage when UBO exceeds GL_MAX_UNIFORM_BLOCK_SIZE. Reviewed-by: Roland Scheidegger <[email protected]>
* ilo: remove missing ilo_fence.h from the sources listEmil Velikov2015-06-181-1/+0
| | | | Signed-off-by: Emil Velikov <[email protected]>
* vc4: Move tile state/alloc allocation into the kernel.Eric Anholt2015-06-179-101/+72
| | | | | | | This avoids a security issue where userspace could have written the tile state/tile alloc behind the GPU's back, and will apparently be necessary for fixing stability bugs (tile state buffers are missing some top bits for the tile alloc's address).
* vc4: Move RCL generation into the kernel.Eric Anholt2015-06-1711-676/+725
| | | | | There weren't that many variations of RCL generation, and this lets us skip all the in-kernel validation for what we generated.
* vc4: Add dumping of VC4_PACKET_TILE_BINNING_MODE_CONFIG.Eric Anholt2015-06-171-1/+32
|
* vc4: Fix memory leak from simple_list conversion.Eric Anholt2015-06-171-3/+2
| | | | | I accidentally shadowed the outside declaration, so we always returned NULL even when we'd found something in the cache.
* vc4: Track the number of BOs allocated and their size.Eric Anholt2015-06-172-7/+100
| | | | This is useful for BO leak debugging.
* nvc0/ir: can't have a join on a load with an indirect sourceIlia Mirkin2015-06-171-1/+1
| | | | | | | | | | | Triggers an INVALID_OPCODE warning on GK208. Seems rare enough to not warrant verification on other chips. Fixes the new piglits: ubo_array_indexing/fs-nonuniform-control-flow.shader_test ubo_array_indexing/vs-nonuniform-control-flow.shader_test Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.5 10.6" <[email protected]>
* vc4: Make sure that direct texture clamps have a minimum value of 0.Eric Anholt2015-06-162-25/+66
| | | | | | | I was thinking of the MIN opcode in terms of unsigned math, but it's signed, so if you used a negative array index, you could read before the UBO. Fixes segfaults under simulation in piglit array indexing tests with mprotect-based guard pages.
* vc4: Swap around which src we spill to ra31/rb31.Eric Anholt2015-06-161-4/+4
| | | | | | | | I wanted to assert that src1 came from a non-unspilled register in shader validation, and this easily gets us that. And, as a bonus: total instructions in shared programs: 93347 -> 92723 (-0.67%) instructions in affected programs: 60524 -> 59900 (-1.03%)
* vc4: R4 is not a valid register for clamped direct texturing.Eric Anholt2015-06-161-1/+1
| | | | | Our array only goes to R3, and R4 is a special case that shouldn't be used.
* vc4: Factor out the live clamp register getter.Eric Anholt2015-06-161-8/+24
|
* vc4: Drop the unused "stride" field of surfaces.Eric Anholt2015-06-161-1/+0
| | | | We're always looking at the slice anyway, when we would have needed it.
* vc4: Handle refcounting the exec BO like we do in the kernel.Eric Anholt2015-06-164-10/+34
| | | | | This reduces the diff to the kernel, and will be useful when I make the kernel allocate more BOs as part of validation.
* vc4: Use VC4_SET/GET_FIELD for some RCL packets.Eric Anholt2015-06-164-77/+89
|
* vc4: Make symbolic values for packet sizes.Eric Anholt2015-06-164-57/+86
|
* vc4: Use symbolic values in texture ptype validation.Eric Anholt2015-06-161-10/+13
|
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-25 17:58:31 +0000