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* winsys/amdgpu: Add support for const IB.Marek Olšák2016-04-192-5/+94
| | | | | | v2: Use the correct IB to update request (Bas Nieuwenhuizen) v3: Add preamble IB. (Bas Nieuwenhuizen) Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: split IB data into a new structure in preparation for CEMarek Olšák2016-04-194-47/+48
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/radeon: move ring_type into winsysesMarek Olšák2016-04-194-9/+11
| | | | | | Not used by drivers. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* gallium/radeon: relax requirements on VRAM placements on APUsMarek Olšák2016-04-122-0/+28
| | | | | | | This makes Tonga with vramlimit=128 2x faster in Heaven. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* winsys/amdgpu: remove hack for low VRAM configurationMarek Olšák2016-04-121-10/+0
| | | | | | | A better solution will be used. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* winsys/radeon: fix printing allocation failuresMarek Olšák2016-04-121-4/+4
| | | | | | print as unsigned instead of signed Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: add support for 64-bit buffer sizesMarek Olšák2016-04-123-17/+22
| | | | | | v2: fail in radeon_winsys_bo_create if size > 32 bits Reviewed-by: Nicolai Hähnle <[email protected]>
* pb_buffer: switch pb_buffer::size to 64 bitsMarek Olšák2016-04-123-6/+8
| | | | | | being able to allocate more than 4 GB may be useful Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: add support for Polaris (v2)Sonny Jiang2016-03-241-0/+8
| | | | | | | | | v2: Polaris chips should be defined after Stoney Signed-off-by: Sonny Jiang <[email protected]> (v1) Reviewed-by: Michel Dänzer <[email protected]> (v1) Signed-off-by: Leo Liu <[email protected]> (v2 diff) Reviewed-by: Alex Deucher <[email protected]> (v2 diff)
* winsys/amdgpu: addrlib - add Polaris support (v2)Sonny Jiang2016-03-243-2/+18
| | | | | | | | v2: fix indentation as noted by Michel Signed-off-by: Sonny Jiang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: remove old CS tracingMarek Olšák2016-03-207-392/+4
| | | | | | | | | | | | | | Cons: - it was only integrated in r600g - it doesn't work with GPUVM - it records buffer contents at the end of IBs instead of at the beginning, so the replay isn't exact - it lacks an IB parser and user-friendliness A better solution is apitrace in combination with gallium/ddebug, which has a complete IB parser and can pinpoint hanging CP packets. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeon/winsys: add layer support for BO exportChristian König2016-03-172-0/+5
| | | | | | | Add layer support to export individual array layers. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeon/winsys: add offset support for BO import/exportChristian König2016-03-172-6/+12
| | | | | | | Add offset support to handle NV12 offsets as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/winsys/drm: add offset to struct winsys_handleChristian König2016-03-174-0/+6
| | | | | | | We are going to need this for EGL_EXT_image_dma_buf_import. Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu/addrlib: do not wrap header inclusion in extern "C"Emil Velikov2016-03-091-2/+2
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: get PCI infoMarek Olšák2016-03-091-2/+15
| | | | | | | | | This will be queried by the OpenCL stack using an interop call. I have tested that the values match lspci. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: allow drivers to set/get opaque metadataMarek Olšák2016-03-091-0/+5
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: rename winsys buffer_get/set_tiling to buffer_get/set_metadataMarek Olšák2016-03-092-12/+12
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove rcs parameter from radeon_winsys::buffer_set_tilingMarek Olšák2016-03-092-9/+0
| | | | | | | | This was needed for DRM < 2.12.0 where the kernel was rewriting tiling flags in IBs. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: use a structure for passing tiling flags from/to winsysMarek Olšák2016-03-092-80/+47
| | | | | | | and call it radeon_bo_metadata Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: add external usage flags to resource_from(get)_handle (v2)Marek Olšák2016-03-091-2/+4
| | | | | | | | | This will allow drivers to make better decisions about texture sharing for DRI2, DRI3, Wayland, and OpenCL. v2: add read/write flags, take advantage of __DRI_IMAGE_USE_BACKBUFFER Reviewed-by: Axel Davy <[email protected]>
* winsys/amdgpu: enlarge buffer_indices_hashlistBas Nieuwenhuizen2016-03-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | Enlarge the buffer hashlist to prevent large numbers of misses due to adding more buffers than can be cached in the hashlist. The game I tested had CS's with up to 1500 buffers and the overhead of amdgpu_lookup_buffer for various sizes was: 4096 1.97% (new value) 2048 4.37% 1024 6.92% 512 9.47% (old value) (percentage of CPU usage in render thread as determined by perf) The time spent in amdgpu_add_buffer self is ~4.2% in all cases and for 4096 the time needed to clear the hashlist is still < 0.10%, so I am not expecting significant regressions. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* svga: add new svga_winsys_context::get_command_buffer_size()Brian Paul2016-03-041-0/+8
| | | | | | | To ask how large the current command buffer is. Will be used for a new GALLIUM_HUD graph. Reviewed-by: Charmaine Lee <[email protected]>
* winsys/svga: Increase the fence timeoutThomas Hellstrom2016-03-041-1/+2
| | | | | | | | | | | If running with a software renderer backend, the timeout may be insufficient, and we don't want to release busy buffers too early. In practice, SVGA gpu lockups are extremely rare. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Cc: "11.0 11.1" <[email protected]>
* winsys/svga: Fix an uninitialized return valueThomas Hellstrom2016-03-041-0/+2
| | | | | | | Reported-by: Brian Paul <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviwed-by: Brian Paul <[email protected]> Cc: "11.0 11.1" <[email protected]>
* winsys/radeon: drop support for DRM 2.12.0 (kernel < 3.2)Marek Olšák2016-03-011-25/+17
| | | | | | | | | | | | | | in order to make some winsys interface changes easier This distros should use new DRM if they want to use new Mesa: Distro kernel mesa eol SLES 10 2.6.16 6.4.2 2016-07 SLED 11 3.0 9.0.3 2022-03 RHEL 5 2.6.18 6.5.1 2017-03 RHEL 6 2.6.32 10.4.3 2020-11 Debian 6 2.6.32 7.7.1 2016-02 Reviewed-by: Michel Dänzer <[email protected]>
* nvc0: initial support for GM20x GPUsBen Skeggs2016-02-161-0/+1
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* gallium/radeon: drop support for LLVM 3.5Marek Olšák2016-02-111-3/+2
| | | | | | Reviewed-by: Nicolai Hähnle <[email protected]> v2: adjust the comment in the amdgpu winsys
* winsys/radeon: fix the num_tile_pipes comment to silence warningsMarek Olšák2016-02-101-3/+3
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* winsys/radeon: better explain the num_tile_pipes fixup for TAHITI (v2)Alexandre Demers2016-02-101-2/+4
| | | | | | | | v2: Clarify the relation between num_tiles_pipes and GB_TILE_MODE and the fix needed for Tahiti as suggested by Marek. Signed-off-by: Alexandre Demers <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* winsys/radeon: fix a wrong NUM_TILE_PIPES value from the kernelMarek Olšák2016-02-091-0/+6
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94019 Tested-by: Nick Sarnie <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: remove radeon_info::r600_tiling_configMarek Olšák2016-02-052-22/+9
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: get pipe_interleave_bytes AKA group_bytes from the winsysMarek Olšák2016-02-052-0/+10
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: set num_banks in the winsysMarek Olšák2016-02-051-0/+5
| | | | | | | amdgpu doesn't have to set this, because radeonsi gets it from tile mode arrays by default. Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: just get num_tile_pipes from the winsysMarek Olšák2016-02-051-0/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* winsys/amdgpu: add an assertion to cik_get_num_tile_pipes (v2)Marek Olšák2016-02-051-1/+4
| | | | | | | v2: print an error to stderr Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* winsys/amdgpu: remove an r600-only settingMarek Olšák2016-02-051-1/+0
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: rename & reorder members of radeon_infoMarek Olšák2016-02-054-32/+32
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* winsys/radeon: Do not deinit the pb cache if it was not initializedNiels Ole Salscheider2016-02-021-2/+3
| | | | | | | This fixes a crash in pb_cache_release_all_buffers. Signed-off-by: Niels Ole Salscheider <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* virgl: mark function as staticDave Airlie2016-02-021-1/+1
| | | | | | | | This is fallout from the previous changes. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93961 Signed-off-by: Dave Airlie <[email protected]>
* virgl: also build vtest for AndroidRob Herring2016-02-021-0/+33
| | | | | | | Enabling swrast on Android causes a link error because vtest is missing. Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* virgl: fix reference counting of prime handlesRob Herring2016-02-022-12/+33
| | | | | | | | | | The virgl reference counting of buffers is broken for prime fd buffers. Each prime fd passed into virgl_drm_winsys_resource_create_handle creates a new resource. The solution requires creating a separate hash table to track flink names separately from prime handles. Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* virgl: reuse screen when fd is already openRob Herring2016-02-022-2/+89
| | | | | | | | | | It is necessary to share the screen between mesa and gralloc to properly ref count resources. This implements a hash lookup on the file description to re-use an already created screen. This is a similar implementation as freedreno and radeon. Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* winsys/amdgpu: Process RADEON_FLAG_* independently from RADEON_DOMAIN_*Michel Dänzer2016-01-291-10/+9
| | | | | | | | | | | In particular, AMDGPU_GEM_CREATE_CPU_GTT_USWC can affect even BOs created in VRAM if they get evicted to GTT. In general there's no need to restrict any of the flags to any particular domains. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* winsys/amdgpu: Handle RADEON_FLAG_NO_CPU_ACCESSMichel Dänzer2016-01-291-0/+2
| | | | | | | | | | | | | | | | Failing to do this was resulting in the kernel driver unnecessarily leaving open the possibility of CPU access to tiled BOs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93862 (This change shouldn't be backported to stable branches, because released versions of xf86-video-amdgpu unnecessarily try to map the front buffer) Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* winsys/amdgpu: optionally use buffer lists with all allocated buffersMarek Olšák2016-01-235-3/+61
| | | | | | | Set RADEON_ALL_BOS=1 to use it. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* virgl: enable building on AndroidRob Herring2016-01-231-0/+34
| | | | | | | | This is just a copy-n-paste and rename of vc4 Android makefiles. Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* winsys/amdgpu: compute num_good_compute_units correctlyMarek Olšák2016-01-221-10/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: rename max_compute_units -> num_good_compute_unitsMarek Olšák2016-01-222-5/+5
| | | | | | radeon sets this correctly, but not amdgpu Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: do not reallocate user memory buffersNicolai Hähnle2016-01-142-0/+12
| | | | | | | | | The whole point of AMD_pinned_memory is that applications don't have to map buffers via OpenGL - but they're still allowed to, so make sure we don't break the link between buffer object and user memory unless explicitly instructed to. Reviewed-by: Marek Olšák <[email protected]>
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