| Commit message (Collapse) | Author | Age | Files | Lines |
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Fix INVALID_OPERATION caused by BufferData with target
EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD when the buffer size is
not page aligned.
Signed-off-by: Marek Olšák <[email protected]>
Cc: 17.3 18.0 <[email protected]>
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It was always 0, breaking (at least) DRI3 with Xwayland.
Bugzilla: https://bugs.freedesktop.org/104306
Fixes: 5f2073be3282 ("ac/surface: add ac_surface::is_displayable")
Reviewed-by: Marek Olšák <[email protected]>
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Add the ability to signal a syncobj when a cs completes execution.
v2: corresponding changes for gallium fence->semaphore rename
v3: s/semaphore/fence for pipe objects
Signed-off-by: Andres Rodriguez <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
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Cc: 18.0 <[email protected]>
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-1 is considered an error for EGL_ANDROID_native_fence_sync, so
we need to actually create a sync file.
Fixes: f536f45250 "radeonsi: implement sync_file import/export"
Reviewed-by: Dave Airlie <[email protected]>
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.mob_fenced was already checked, probably a copy-paste bug.
Found by Coccinelle.
Signed-off-by: Grazvydas Ignotas <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
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This adds the meson.build, meson_options.txt, and a few scripts that are
used exclusively by the meson build.
v2: - Remove accidentally included changes needed to test make dist with
LLVM > 3.9
Signed-off-by: Dylan Baker <[email protected]>
Acked-by: Eric Engestrom <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
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The logic had two fatal flaws which completely killed the default value.
1) drm will overwrite the value anyway even if the chip can't be handled
2) the default value logic is relying on num_render_backends, which was
filled in later.
Luckily noone is relying on it, but it's a bit confusing seeing the chip clock
printed out there (as hex) with R600_DEBUG=info...
(Albeit radeonsi does not appear to fix up the value. If kernels which don't
handle this query are still supported, radeonsi will still end up with a broken
enabled_rb_mask, I have no idea of the potential results of this there.)
Reviewed-by: Dave Airlie <[email protected]>
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Cc: 17.3 <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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src/gallium/winsys/pl111/drm/libpl111winsys.a(pl111_drm_winsys.c.o): In function `pl111_drm_screen_create':
pl111_drm_winsys.c:(.text+0x33): undefined reference to `vc4_drm_screen_create_renderonly'
Signed-off-by: Eric Engestrom <[email protected]>
Reviewed-by: Dylan Baker <[email protected]>
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`declare_dependency()` takes `compile_args`, not `c_args`.
It was correct in all the other `declare_dependency()` from that commit.
Fixes: 0bbecc5a8548883f76a71 "meson: define driver dependencies"
Signed-off-by: Eric Engestrom <[email protected]>
Reviewed-by: Dylan Baker <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Together with "radeonsi: fix the R600_RESOURCE_FLAG_UNMAPPABLE check",
this ensures that sparse buffers are placed in VRAM.
Noticed by an assertion that started triggering with commit d4fac1e1d7
("gallium/radeon: enable suballocations for VRAM with no CPU access")
Fixes KHR-GL45.sparse_buffer_tests.BufferStorageTest in debug builds.
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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The combined VRAM|GTT heap will be removed.
Reviewed-by: Nicolai Hähnle <[email protected]>
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This allow us to encapsulate the compiler and linkage requirements of
each driver in a reusable way. The result will be that each target that
needs a specific driver can simply add `driver_<name>` to its
dependencies line and the necessary libraries and compiler args will be
added. This will allow for a lot of code de-duplication between gallium
targets.
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
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Signed-off-by: Eric Engestrom <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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and handle PIPE_FLUSH_HINT_FINISH in r300.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Build tested only.
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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Build tested only.
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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Build tested only.
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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The next commit will reduce the size even more.
v2: typecast to uint64_t manually
v3: add more typecasts, add asserts
Reviewed-by: Nicolai Hähnle <[email protected]>
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New cs support is needed for vcn encode
Signed-off-by: Boyuan Zhang <[email protected]>
Acked-by: Christian König <[email protected]>
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Using build_by_default : false is convenient for dependencies that can
be pulled in by various diverse components of the build system, the
gallium hardware/software drivers and state trackers do not fit that
description. Instead, these should be guarded using the variable that tracks
whether that driver should be enabled.
This leaves a few helper libraries: trace, rbug, etc, and the generic
winsys bits as `build_by_default : false` because there are a large
number of gallium components that pull them in.
v2: - remove build_by_default from winsys convenience libs as well.
v3: - Always put drivers before winsys for consistency
Signed-off-by: Dylan Baker <[email protected]>
Tested-by: Lionel Landwerlin <[email protected]> (v1)
Reviewed-by: Eric Anholt <[email protected]>
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Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
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The idea is to fix the following interleaving of operations
that can arise from deferred fences:
Thread 1 / Context 1 Thread 2 / Context 2
-------------------- --------------------
f = deferred flush
<------- application-side synchronization ------->
fence_server_sync(f)
...
flush()
flush()
We will now stall in fence_server_sync until the flush of context 1
has completed.
This scenario was unlikely to occur previously, because applications
seem to be doing
Thread 1 / Context 1 Thread 2 / Context 2
-------------------- --------------------
f = glFenceSync()
glFlush()
<------- application-side synchronization ------->
glWaitSync(f)
... and indeed they probably *have* to use this ordering to avoid
deadlocks in the GLX model, where all GL operations conceptually
go through a single connection to the X server. However, it's less
clear whether applications have to do this with other WSI (i.e. EGL).
Besides, even this sequence of GL commands can be translated into
the Gallium-level sequence outlined above when Gallium threading
and asynchronous flushes are used. So it makes sense to be more
robust.
As a side effect, we no longer busy-wait on submission_in_progress.
We won't enable asynchronous flushes on radeon, but add a
cs_add_fence_dependency stub anyway to document the potential
issue.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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This uses C++11 initializer lists.
I just overwrote all Mesa files with internal addrlib and discarded
hunks that we should probably keep, but I might have missed something.
The code depending on ADDR_AM_BUILD is removed. We can add it back next
time if needed.
Acked-by: Nicolai Hähnle <[email protected]>
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Reviewed-by: Alex Deucher <[email protected]>
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Fixes reverted patch f03b7c9 by doing VMID reservation per
process and not per context.
Also updates required amdgpu libdrm version since the change
involved interface updates in amdgpu libdrm.
Signed-off-by: Andrey Grodzovsky <[email protected]>
Signed-off-by: Marek Olšák <[email protected]>
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It's inaccurate. Instead, see the copyright and use "git log" and
"git blame" to know the authorship.
Acked-by: Nicolai Hähnle <[email protected]>
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__asm__ is portable, and allows the svga driver to be compiled with the
c99 standard instead of requiring the gnu99 standard.
I have compile tested this with GCC and Clang on Linux.
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
Tested-by: Brian Paul <[email protected]>
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This reverts commit f03b7c9ad92c1656a221297819fbc6d065cc0af7.
The libdrm interface is wrong.
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Signed-off-by: Andrey Grodzovsky <[email protected]>
Signed-off-by: Marek Olšák <[email protected]>
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Obtained from: FreeBSD ports
Signed-off-by: Emil Velikov <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
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Mostly copy/pasta from Dylan Baker's conversion of nouveau and i965.
Signed-off-by: Rob Clark <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Reviewed-by: Dylan Baker <[email protected]>
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Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
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v2: Default vc5 to off, since it requires the simulator currently. Add
missing dep on the XML generation from libbroadcom_vc5.
Reviewed-by: Dylan Baker <[email protected]> (v1)
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Reviewed-by: Dylan Baker <[email protected]>
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Reviewed-by: Dylan Baker <[email protected]>
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It shows the sum of all IBs per frame.
Reviewed-by: Nicolai Hähnle <[email protected]>
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This should decrease IB fetch latency.
Reviewed-by: Nicolai Hähnle <[email protected]>
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i.e. don't use |=
Reviewed-by: Nicolai Hähnle <[email protected]>
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Tested with a GK107.
v2: - Add target for nouveau standalone compiler. This target is not
built by default.
v3: - Add nouveau to list of drivers built by default
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Eric Anholt <eric at anholt.net>
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Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Eric Anholt <eric at anholt.net>
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This builds the radeonsi (and radeon) window system bits and gallium
driver bits.
Signed-off-by: Dylan Baker <[email protected]>
Reviewed-by: Eric Anholt <eric at anholt.net>
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