summaryrefslogtreecommitdiffstats
path: root/src/gallium/winsys
Commit message (Collapse)AuthorAgeFilesLines
* scons: avoid building any piece of i915Emil Velikov2014-06-211-12/+0
| | | | | | | Leftover from commit c21fca8bf24. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jakob Bornecrantz <[email protected]>
* automake: stop building i915-sw and drop explicit linking to softpipeEmil Velikov2014-06-191-1/+1
| | | | | | | Unused and possibly broken. Will be completely removed in upcomming commits. Signed-off-by: Emil Velikov <[email protected]>
* radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITSBruno Jiménez2014-06-132-0/+8
| | | | | | | | v2: Add RADEON_INFO_ACTIVE_CU_COUNT as a define, as suggested by Tom Stellard Reviewed-by: Tom Stellard <[email protected]>
* scons: remove dri-i915 build targetEmil Velikov2014-06-091-14/+0
| | | | | | | | Unmaintained and broken. Cc: Jakob Bornecrantz <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Acked-by: Jakob Bornecrantz <[email protected]>
* Make DRI dependencies and build depend on the targetJon TURNEY2014-05-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Don't require xcb-dri[23] etc. if we aren't building for a target with DRM, as we won't be using dri[23] - Enable a more fine-grained control of what DRI code is built, so that a libGL using direct swrast can be built on targets which don't have DRM. The HAVE_DRI automake conditional is retired in favour of a number of other conditionals: HAVE_DRI2 enables building of code using the DRI2 interface (and possibly DRI3 with HAVE_DRI3) HAVE_DRISW enables building of DRI swrast HAVE_DRICOMMON enables building of target-independent DRI code, and also enables some makefile cases where a more detailled decision is made at a lower level. HAVE_APPLEDRI enables building of an Apple-specific direct rendering interface, still which requires additional fixing up to build properly. v2: Place xfont.c and drisw_glx.c into correct categories. Update 'make check' as well Signed-off-by: Jon TURNEY <[email protected]> Reviewed-by: Jeremy Huddleston Sequoia <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* nvc0: enable support for maxwell boardsBen Skeggs2014-05-151-0/+1
| | | | | Signed-off-by: Ben Skeggs <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* ilo: destroy the mutex, if winsys creation failsEmil Velikov2014-05-101-0/+1
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* radeonsi: add support for Mullins asics.Samuel Li2014-05-022-0/+2
| | | | | | | | | | | v2: name defaults to kabini for older llvm v3: fix llvm version check Signed-off-by: Samuel Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCYTom Stellard2014-04-292-0/+6
| | | | | | | | | | | | Igor Gnatenko: v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes) Bruno Jiménez: v3: Convert the frequency to MHz from kHz after getting it in 'do_winsys_init' Signed-off-by: Igor Gnatenko <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g: disable async DMA on R700Marek Olšák2014-04-251-1/+2
| | | | Cc: 10.0 10.1 [email protected]
* winsys/radeon: remove some unused codeMarek Olšák2014-04-171-28/+8
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* winsys/radeon: remove is_handle_added arrayMarek Olšák2014-04-172-30/+34
| | | | | | Use index -1 if a buffer is not added. Reviewed-by: Michel Dänzer <[email protected]>
* winsys/radeon: remove local variable reloc from radeon_get_relocMarek Olšák2014-04-171-5/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* winsys/radeon: remove parameter reloc from radeon_get_relocMarek Olšák2014-04-172-11/+8
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: create and return a fence in the flush functionMarek Olšák2014-04-164-22/+36
| | | | | | All flush functions get a fence parameter. cs_create_fence is removed. Reviewed-by: Christian König <[email protected]>
* winsys/radeon: fold cs_set_flush_callback into cs_createMarek Olšák2014-04-162-26/+12
| | | | Reviewed-by: Christian König <[email protected]>
* winsys/radeon: remove cs_write_reloc, add simpler cs_get_relocMarek Olšák2014-04-162-26/+19
| | | | | | | The only difference is that it doesn't write to the CS and only returns the index. Reviewed-by: Christian König <[email protected]>
* winsys/radeon: consolidate hash table lookupMarek Olšák2014-04-162-68/+49
| | | | | | I should have done this long ago. Reviewed-by: Christian König <[email protected]>
* winsys/radeon: fix a race condition in initialization of radeon_winsys::screenMarek Olšák2014-04-102-3/+21
| | | | | | | | Create the screen in the winsys while the mutex is locked. This also results in a nice code cleanup! Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* winsys/radeon: fix a race condition between winsys_create and winsys_destroyMarek Olšák2014-04-103-21/+30
| | | | | | | | | This also hides the reference count from drivers. v2: update the reference count while the mutex is locked in winsys_create Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* winsys/radeon: fix a race condition between 2 calls to radeon_winsys_createMarek Olšák2014-04-101-3/+17
| | | | | | | This fixes random crashes of: piglit/glx-multithread-shader-compile. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* winsys/radeon: remove unused radeon_info variables, move backend_mapMarek Olšák2014-04-104-7/+9
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* winsys/radeon: unify radeon_bo::flink and radeon_bo::nameMarek Olšák2014-04-102-14/+10
| | | | | | | Both contained the GEM flink name. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* winsys/radeon: remove definitions already present in radeon_drm.hMarek Olšák2014-04-104-205/+5
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* winsys/radeon: handle squared micro tiling from GEM_GET_TILINGMarek Olšák2014-04-101-0/+2
| | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* r600g,radeonsi: add a bunch of useful queries for the HUDMarek Olšák2014-04-094-4/+31
|
* r600g,radeonsi: set correct initial domain for shared resourcesMarek Olšák2014-04-092-22/+58
|
* gallium/radeon: fix warningsMarek Olšák2014-04-091-1/+1
|
* winsys/svga: Fix prime surface references also for guest-backed surfacesThomas Hellstrom2014-04-073-6/+81
| | | | | | | | | Implement guest-backed surface sharing using prime fds. Previously only legacy surfaces could use this functionality. Also use the vmwgfx 2.6 single-ioctl prime fd reference if available. Cc: "10.1" <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]>
* winsys/svga: Update the vmwgfx_drm.h header to latest version from kernelThomas Hellstrom2014-04-071-1/+12
| | | | | Cc: "10.1" <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]>
* winsys/svga: Replace the query mm buffer pool with a slab pool v3Thomas Hellstrom2014-04-021-5/+13
| | | | | | | | | | | | | | | This is to avoid running out of query buffer space due to winsys limitations. Instead of a fixed size per screen pool of query buffers, use a slab allocator that allocates a new slab if we run out of space in the first one. v2: Correct email addresses. v3: s/8192/VMW_QUERY_POOL_SIZE/. Improve documentation and log message. Reported-and-tested-by: Brian Paul <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Cc: "10.1" <[email protected]>
* winsys/radeon: only add duplicate relocations for DMA if VM isn't supportedMarek Olšák2014-03-201-10/+13
| | | | | | Also rewrite the comment for it to be readable and reorder the code. Reviewed-by: Alex Deucher <[email protected]>
* winsys/radeon: Store GPU virtual memory addresses of BOs in a hash tableMichel Dänzer2014-03-171-48/+26
| | | | | | | | | | | | | This allows retrieving the existing BO and incrementing its reference count, instead of creating a separate winsys representation for it, when the kernel reports that the BO was already assigned a virtual memory address. This fixes problems with XWayland using radeonsi and the xf86-video-wlglamor driver, which calls GEM flink outside of the radeon winsys code and creates BOs from the flinked names using the same DRM file descriptor. Reviewed-by: Marek Olšák <[email protected]>
* r300g,uvd,vce: set priorities for relocationsMarek Olšák2014-03-112-5/+7
| | | | This updates all occurences of cs_add_reloc.
* winsys/radeon: add interface for setting a priority number for each relocationMarek Olšák2014-03-112-8/+32
| | | | | The cs_add_reloc change is commented out not to break compilation. The highest priority of all cs_add_reloc calls is send to the kernel.
* ilo: do not set I915_EXEC_NO_RELOCChia-I Wu2014-03-101-11/+1
| | | | | | | This reverts most of commit d80f0c34b733a874adfdd3a2267e4deec345cc6b. Upon a closer reading, having the presumed offsets written is not enough to set the flag. EXEC_OBJECT_NEEDS_GTT and/or EXEC_OBJECT_WRITE of the reloc entries must also be set appropriately.
* ilo: print a warning when PPGTT is disabledChia-I Wu2014-03-102-0/+4
| | | | | Despite what the PRMs say, the driver appears to work fine when PPGTT is disabled. But at least print a warning in that case.
* ilo: require hardware logical context supportChia-I Wu2014-03-102-2/+20
| | | | The code paths are not tested for a while, and have some known issues.
* ilo: protect the decode context with a mutexChia-I Wu2014-03-101-7/+20
| | | | The decode context is not thread safe.
* ilo: set I915_EXEC_NO_RELOC when availableChia-I Wu2014-03-102-3/+15
| | | | | The winsys makes it clear that the pipe drivers should write presumed offsets. We can always set I915_EXEC_NO_RELOC when the kernel supports it.
* ilo: move ring types to winsysChia-I Wu2014-03-102-15/+19
| | | | | It results in less code despite that i915_drm.h specifies the ring type as part of the execution flags.
* ilo: winsys may limit the batch buffer sizeChia-I Wu2014-03-102-0/+3
| | | | | | The maximum batch buffer size is determined at the time of drm_intel_bufmgr_gem_init(). Make sure the pipe driver does not exceed the limit.
* ilo: PIPE_CAP_QUERY_TIMESTAMP may not be supportedChia-I Wu2014-03-102-0/+15
| | | | Reading TIMESTAMP register may fail, depending on both kernel and hardware.
* ilo: rework winsys batch buffer functionsChia-I Wu2014-03-102-38/+47
| | | | | | | | | | | Rename intel_winsys_check_aperture_size() to intel_winsys_can_submit_bo(), intel_bo_exec() to intel_winsys_submit_bo(), and intel_winsys_decode_commands() to intel_winsys_decode_bo(). Make a semantic change to ignore intel_context when the ring is not the render ring.
* ilo: replace bo alloc flags by initial domainsChia-I Wu2014-03-102-13/+12
| | | | | | The only alloc flag is INTEL_ALLOC_FOR_RENDER, which can as well be expressed by specifying the initial write domain. The change makes it obvious that we failed to set INTEL_ALLOC_FOR_RENDER in several places.
* ilo: remove intel_bo_get_size()Chia-I Wu2014-03-102-13/+0
| | | | | | Commit bfa8d21759c5f2b5b0885c696842167bd4c64fee uses it to work around a hardware limitation. But there are other ways to do it without the need for intel_bo_get_size().
* ilo: remove intel_bo_get_virtual()Chia-I Wu2014-03-102-24/+36
| | | | Make the map functions return the pointer directly.
* ilo: rework winsys bo reloc functionsChia-I Wu2014-03-102-26/+22
| | | | | | | | | | | | | Rename intel_bo_emit_reloc() to intel_bo_add_reloc(), intel_bo_clear_relocs() to intel_bo_truncate_relocs(), and intel_bo_references() to intel_bo_has_reloc(). Besides, we need intel_bo_get_offset() only to get the presumed offset afer adding a reloc entry. Remove the function and make intel_bo_add_reloc() return the presumed offset. While at it, switch to gem_bo->offset64 from gem_bo->offset.
* ilo: add a wrapper to cast struct intel_boChia-I Wu2014-03-101-23/+28
| | | | It is just drm_intel_bo, but having a wrapper makes the code cleaner.
* ilo: fix DRM_API_HANDLE_TYPE_FD exportChia-I Wu2014-03-101-2/+0
| | | | | It can be exported by drm_intel_bo_gem_export_to_prime(). The code is already in winsys, just not enabled.
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-22 09:15:44 +0000